LH5496HU-25 データシートの表示（PDF） - Sharp Electronics

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LH5496HU-25

CMOS 512 × 9 FIFO

Sharp Electronics 

LH5496/96H

TIMING DIAGRAMS (cont’d)

LAST WRITE

R

W

t WFF

FF

FIRST READ

tRFF

Figure 7. Full Flag from Last Write to First Read

CMOS 512 × 9 FIFO

5496-6

LAST READ

W

FIRST WRITE

R

t REF

EF

t WEF

NOTE: The Data Out pins (D0 - D8) are forced into a

high-impedance state whenever EF = LOW.

Figure 8. Empty Flag from Last Read to First Write

5496-7

8

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