PDM31256SA10SO データシートの表示（PDF） - Paradigm Technology
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PDM31256SA10SO Datasheet PDF : 7 Pages
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Features
n High-speed access times
Com’l: 10, 12, 15 and 20ns
Ind’l: 12, 15 and 20ns
n Low power operation (typical)
- PDM31256SA
Active: 200 mW
Standby: 15mW
n Single +3.3V (±0.3V) power supply
n TTL-compatible inputs and outputs
n Packages
Plastic SOJ (300 mil) - SO
Plastic TSOP (I) - T
PDM31256
3.3V 256K Static RAM
32K x 8-Bit
1
Description
2 The PDM31256 is a high-performance CMOS static
RAM organized as 32,768 x 8 bits. Writing to this
device is accomplished when the write enable (WE)
and the chip enable (CE) inputs are both LOW.
3 Reading is accomplished when WE remains HIGH
and CE and OE are both LOW.
The PDM31256 operates from a single +3.3V power
supply and all the inputs and outputs are fully TTL-
compatible.
4
The PDM31256 is available in a 28-pin 300-mil
plastic SOJ and a 28-pin plastic TSOP (I).
5
6
Functional Block Diagram
A0
•
•
Addresses
•
•
•
A14
I/O 0
•
•
I/O7
CE
WE
Control
OE
Decoder
Input
Data
Control
• Memory
•
•
•
Matrix
•
•
•••••
Column I/O
•
•
•
7
8
9
10
11
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Rev. 3.3 - 4/29/98
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