PEF2015 データシートの表示（PDF） - Siemens AG
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PEF2015 Datasheet PDF : 84 Pages
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1.3
Pin Description
PEF 2015
Overview
Pin Symbol Input (I) Function
No.
Output (O)
23
FSC
I/O
Frame Synchronization
Input or output in IOM-configuration.
Direction indication in SLD-mode.
22
DCL
I/O
Data Clock
Input or output in IOM-configuration. Slave clock in
SLD mode.
Single or double data rate in IOM-configuration, single
data rate in SLD-mode.
24
DU, SIP4 I, I/O (OD) Data Upstream, Input IOM- or PCM-configuration.
Serial Interface Port, SLD configuration.
25
DD, SIP0 O, I/O (OD) Data Downstream, Output IOM- or PCM-configuration
Serial Interface Port, SLD configuration.
Depending on the bit OMDR:COS this line has
push-pull or open drain characteristic.
For unused or unassigned channels or when bit
OMDR:CSB is reset the pin is in the state high
impedance.
7
PFS
I
PCM-Interface Frame Synchronization
8
PDC
I
PCM-Interface Data Clock
Single or double data rate.
6
TxD
O
Transmit PCM-Interface Data
Time-slot oriented data is shifted out of the MICOs
upstream data memory on this line. For time-slots
which are flagged in the tristate data memory or
when bit OMDR:PSB is reset the pin is set in the
state high impedance.
5
TSC
O
Tristate Control
Supplies a control signal for an external driver. This
line is ’low’ when corresponding TxD outputs are valid.
During reset this line is high.
4
RxD
I
Receive PCM-Interface Data
Time-slot oriented data is received on this pin and
forwarded into the downstream data memory of the
MICO.
Semiconductor Group
9
12.97
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