U5020M データシートの表示（PDF） - Atmel Corporation

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U5020M

Digital Window Watchdog Timer

Atmel Corporation 

Figure 4-1. Period t versus R1, at C1 = 500 pF

1000.00

100.00

t (µs)

10.00

1.00

1

10

Figure 4-2. Power-up Reset and Mode Switchover

VDD

t0

Reset out

Mode

C1 = 500 pF

100

R1 (kΩ)

t1

4.5 V

5.0 V

5.5 V

1000

Pin 13

t6

Pin 10

Pin 12

4.3 Supply Voltage Monitoring, Pin 10

The integrated power-on reset (POR) circuitry sets the internal logic to a defined basic status

and generates a reset pulse at the reset output, pin 10, during ramp-up of the supply voltage and

in the case of voltage drops of the supply. A hysteresis in the POR threshold prevents the circuit

from oscillating. During ramp-up of the supply voltage, the reset output stays active for a speci-

fied period of time (t0) in order to bring the microcontroller in its defined reset status (see Figure

4-2). Pin 10 has an open-drain output.

4.4 Switch-over Mode Time, Pin 12

The switch-over mode time enables the synchronous operation of microcontroller and watchdog.

When the power-up reset time has elapsed, the watchdog has to be switched to monitoring

mode by the microcontroller by a “low” signal transmitted to the mode pin (pin 12) within the

time-out period, t1. If the low signal does not occur within t1, (see Figure 4-2) the watchdog gen-

erates a reset pulse, t6, and the time, t1, starts again. Microcontroller and watchdog are

synchronized with the switchover mode time, t1, each time a reset pulse is generated.

4 U5020M

4755B–AUTO–11/05

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