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ISPLSI1016E-100LJI(1998) データシートの表示(PDF) - Lattice Semiconductor

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ISPLSI1016E-100LJI
(Rev.:1998)
Lattice
Lattice Semiconductor Lattice
ISPLSI1016E-100LJI Datasheet PDF : 12 Pages
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Maximum GRP Delay vs GLB Loads
3
2
1
Specifications ispLSI 1016E
ispLSI 1016E-80
ispLSI 1016E-100
ispLSI 1016E-125
1
4
8
12
16
GLB Load
16E GRP/GLB.eps
Power Consumption
Power consumption in the ispLSI 1016E device depends Figure 3 shows the relationship between power and
on two primary factors: the speed at which the device is operating speed.
operating and the number of Product Terms used.
Figure 3. Typical Device Power Consumption vs fmax
130
ispLSI 1016E
120
110
100
90
80
0 20 40 60 80 100 120 140
fmax (MHz)
Notes: Configuration of four 16-bit counters
Typical current at 5V, 25°C
ICC can be estimated for the ispLSI 1016E using the following equation:
ICC(mA) = 23 + (# of PTs * 0.52) + (# of nets * max freq * 0.004)
Where:
# of PTs = Number of product terms used in design
# of nets = Number of signals used in device
Max freq = Highest clock frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of four GLB loads
on average exists and the device is filled with four 16-bit counters. These values are for estimates only. Since the
value of ICC is sensitive to operating conditions and the program in the device, the actual ICC should be verified.
0127B-16-80-isp/1016
9

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