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74LVC541A-Q100 データシートの表示(PDF) - NXP Semiconductors.

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74LVC541A-Q100 Datasheet PDF : 16 Pages
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Nexperia
74LVC541A-Q100
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
5. Pinning information
5.1 Pinning
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Fig 3. Pin configuration for SO20 and TSSOP20
5.2 Pin description
Table 2.
Symbol
OE1
A[0:7]
GND
Y[0:7]
OE2
VCC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
WHUPLQDO 
LQGH[ DUHD
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7UDQVSDUHQW WRS YLHZ
(1) This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
Fig 4. Pin configuration for DHVQFN20
Description
output enable input (active LOW)
data input
ground (0 V)
bus output
output enable input (active LOW)
supply voltage
74LVC541A_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 4 March 2013
© Nexperia B.V. 2017. All rights reserved
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