CY74FCT162501ATPAC データシートの表示（PDF） - Cypress Semiconductor
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CY74FCT162501ATPAC Datasheet PDF : 7 Pages
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CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Pin Description
Name
OEAB
OEBA
LEAB
LEBA
CLKAB
CLKBA
A
B
Description
A-to-B Output Enable Input
B-to-A Output Enable Input (Active LOW)
A-to-B Latch Enable Input
B-to-A Latch Enable Input
A-to-B Clock Input
B-to-A Clock Input
A-to-B Data Inputs or B-to-A Three-State
Outputs[1]
B-to-A Data Inputs or A-to-B Three-State
Outputs[1]
Function Table[2, 3]
Inputs
Outputs
OEAB
LEAB CLKAB
A
B
L
X
X
X
Z
H
H
X
L
L
H
H
X
H
H
H
L
L
L
H
L
H
H
H
L
L
X
B[4]
H
L
H
X
B[5]
Maximum Ratings[6, 7]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Temperature ..................................... −55°C to +125°C
Ambient Temperature with
Power Applied .................................................. −55°C to +125°C
DC Input Voltage................................................. −0.5V to +7.0V
DC Output Voltage.............................................. −0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin)............................−60 to +120 mA
Power Dissipation ..........................................................1.0W
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Operating Range
Range
Commercial
Ambient
Temperature
−40°C to +85°C
VCC
5V ± 10%
Notes:
1. On the 74FCT162H501T these pins have bus hold.
2. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, and CLKBA.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-impedance
= LOW-to-HIGH Transition
4. Output level before the indicated steady-state input conditions were established.
5. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.
6. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
7. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
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