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TGS2353-2-SM データシートの表示(PDF) - TriQuint Semiconductor

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TGS2353-2-SM
TriQuint
TriQuint Semiconductor TriQuint
TGS2353-2-SM Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Application Circuit
TGS2353-2-SM
0.5 to 18 GHz High Power SPDT Reflective Switch
PIN 1
INDICATOR
Vc1
-40 V / 0 V
J2
RF Out 1
22 21 20 19 18 17
1
16
2
J1
3
RF In
4
15
TGS2353-2-SM
14
13
5
12
6 7 8 9 10 11
Vc2
0 V / -40 V
J3
RF Out 2
The switch can be configured as a Single-Pole, Single-Throw (SPST) by terminating one
unused RF Out port with a 50 Ω load.
Bias-up Procedure
Bias-down Procedure
1. VC1 or VC2 set to 0 V (see Function Table for RF Path)
2. VC2 or VC1 set to -40 V (see Function Table for RF Path)
3. Apply RF signal to RF Input
1. Turn off RF supply
2. Turn VC2 or VC1 to 0 V
3. Turn VC1 or VC2 to 0 V
Function Table
RF Path
RF In to RF Out1 (50 Ω load to RF Out2)
RF In to RF Out2 (50 Ω load to RF Out1)
Preliminary Datasheet: Rev - 01-07-14
© 2014 TriQuint
State
Insertion Loss
Isolation
Insertion Loss
Isolation
- 7 of 11 -
VC1
0V
−40 V
−40 V
0V
VC2
−40 V
0V
0V
−40 V
Disclaimer: Subject to change without notice
www.triquint.com

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