TH8061JDC データシートの表示（PDF） - Melexis Microelectronic Systems

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TH8061JDC

LIN Bus Transceiver with integrated Voltage Regulator

Melexis Microelectronic Systems  

TH8061

LIN Bus Transceiver with integrated Voltage Regulator

Functional Description

The TH8061 consists a low drop voltage regulator

5V/50mA and a LIN Bus transceiver, which is a bi-

directional bus interface device for data transfer between

LIN-Bus and the LIN protocol controller.

LIN-BUS Transceiver

The TH8061 is a bi-directional bus interface device for

data transfer between LIN-Bus and the LIN protocol con-

troller.

The transceiver consists a pnp-driver (1.2V@40mA) with

slew rate control and fold-back characteristic and con-

sists as well in the receiver a high voltage comparator

followed by a debouncing unit.

The BUS pin has an integrated 30k pull up resistor with a

diode, which prevent the reverse current of VBUS during

differential voltage between VSUP and BUS (VBUS>VSUP).

RxD

TxD

to wake up logic

tdebW AKE

+5V

ESD

MR

TSHD

tdebBUS

BIAS

VthL

VthH

pnp-

Control

slew rate

IfBoldback

Figure 2 - Block Diagram LIN Bus Transceiver

VSUP

30k

BUS

Transmit Mode

During the transmission the data at the pin TxD will be

transferred to the pin BUS. To minimize the electromag-

netic emission of the bus line, the TH8061 has an inte-

grated slew rate control.

TxD

VBAT

VSUP

0.8 VBAT

BUS

0.2 VBAT

VDiode

recessive

dominant

Figure 3 - Transmit Mode Pulse Diagram

Datasheet Rev 1.2 Feb 2001

Page 3

www.melexis.com

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