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ICS503 データシートの表示(PDF) - Integrated Device Technology

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ICS503
IDT
Integrated Device Technology IDT
ICS503 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
LOCO™ PLL CLOCK MULTIPLIER
DATASHEET
ICS503
Description
The ICS503 is a member of the LOCOTM family, the
most cost effective way to generate a high-quality, high
frequency clock output from a lower frequency crystal
or clock input. The name LOCO stands for Low Cost
Oscillator, as it is designed to replace crystal oscillators
in most electronic systems. Using Phase-Locked-Loop
(PLL) techniques, the device uses a standard
fundamental mode, inexpensive crystal to produce
output clocks up to 160 MHz.
Stored in the chip’s ROM is the ability to generate nine
different multiplication factors, allowing one chip to
output many common frequencies (see table on page
2).
This product is intended for clock generation. It has low
output jitter (variation in the output period), but input to
output skew and jitter are not defined or guaranteed.
For applications which require defined input to output
skew, use the ICS570B.
Features
Packaged as 8-pin SOIC (Pb-free) or die
IDT’s lowest cost PLL clock
Generates 16.9344 MHz for stereo codecs from the
14.31818 MHz motherboard clock.
Can be cost effective in replacing a single
surface-mount crystal
Can be driven by other 5xx series
Input crystal frequency of 5 - 27 MHz
Input clock frequency of 2 - 50 MHz
Output clock frequencies up to 160 MHz
Low jitter - 50 ps one sigma
Duty cycle of 45/55 up to 160 MHz
Operating voltages of 3.0 to 5.5V
25 mA drive capability at TTL levels
Advanced, low power CMOS process
Block Diagram
VDD
CLK
S1, S0
2
PLL Clock
Multiplier
X1/ICLK
Circuitry and
Crystal or
Clock input
X2
Crystal
OScillator
ROM
Optional crystal
capacitors
GND
IDT™ / ICS™ LOCO™ PLL CLOCK MULTIPLIER
1
ICS503
REV D 051310

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