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TMC2249A データシートの表示(PDF) - Raytheon Company

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TMC2249A
Raytheon
Raytheon Company Raytheon
TMC2249A Datasheet PDF : 16 Pages
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PRODUCT SPECIFICATION
TMC2249A
Pin Descriptions
Pin Number
Pin Name
PGA
MQFP
Pin Function Description
Power
VDD
F3, H3, L7, C8 12, 20, 46, 102 Supply Voltage. The TMC2249A operates from a single +5V
supply. All power and ground pins must be connected.
GND
E3, G3, J3, L6, 8, 16, 24, 42, Ground. The TMC2249A operates from a single +5V supply. All
H11, C7
72, 106 power and ground pins must be connected.
Clock
CLK
C3
1
System Clock. The TMC2249A operates from a single master clock
input. The rising edge of clock strobes all enabled registers. All
timing specifications are referenced to the rising edge of CLK.
Inputs
A11-0
N8, M8, L8, 48, 49, 50, 51,
N9, M9, N10, 52, 53, 54, 55,
L9, M10, N11, 56, 57, 58, 59
N12, L10, M11
A-D Input. A through D are the four 12-bit registered data input
ports. A0-D0 are the LSBs (see Table 1). Data presented to the input
ports is clocked in to the top of the 16-stage delay pipeline on the
next clock when enabled, "pushing" data down the register stack.
B11-0
N7, M7, N6,
M6, N5, M5,
N4, L5, M4,
N3, M3, L4
47, 45, 44, 43,
41, 40, 39, 38,
37, 36, 35, 34
C11-0
A9, B9, A10, 101, 100, 99,
C9, B10, A11, 98, 97, 96, 95,
B11, C10, A12, 94, 93, 92, 91,
B12, C11, A13
90
D11-0
B8, A8, B7, A7, 103, 104, 105,
A6, B6, C6, A5, 107, 108, 109,
B5, A4, C5, B4 110, 111, 112
113, 114, 115
ADEL3-0
BDEL3-0
CDEL3-0
DDEL3-0
L11, M12, 61, 62, 63, 64
M13, K11
M2, L3, N1, L2 32, 31, 30, 29
D11, B13, 88, 87, 86, 85
C13, D12
A2, C4, B3, A1 117, 118, 119,
120
A-D Delay. ADEL through DDEL are the four-bit registered input
data pipe delay select word inputs. Data to be presented to the
multipliers is selected from one of sixteen stages in the input data
delay pipe registers, as indicated by the delay select word presented
to the respective input port during that clock. The minimum delay is
one clock (select word=0000), and the maximum delay is 16 clocks
(select word=1111). Following powerup these values are
indeterminate and must be initialized by the user.
CAS15-0
L13, K12, J11, 66, 67, 68, 69,
K13, J12, J13, 70, 71, 73, 74,
H12, H13, 75, 76, 77, 78,
G12, G11, 79, 80, 81, 82
G13, F13, F12,
F11, E13, E12
Cascade Input. CAS is the 16-bit Cascade data input port. CAS0 is
the LSB. See Table 1.
Controls
S15-0
C1, D2, D1,
E2, E1, F2, F1,
G2, G1, H1,
H2, J1, J2, K1,
K2, L1
6, 7, 9, 10, 11,
13, 14, 15, 17,
18, 19, 21, 22,
23, 25, 26
Sum Output. The current 16-bit result is available at the Sum output.
The output may be the most or least significant 16 bits of the current
accumulator output, as determined by SWAP. S0 is the LSB. See
Table 1.
5

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