AD598JR データシートの表示（PDF） - Analog Devices

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AD598JR

LVDT Signal Conditioner

Analog Devices 

AD598

13. Load current through RL returns to the junction of R5 and

R6, and flows back to VPS. Under maximum load condi-

tions, make sure the voltage drop across R5 is met as

defined in Step 12.

As a final check on the power supply voltages, verify that the

peak values of VA and VB are at least 2.5 volts less than the

voltages at +VS and –VS.

14. C5 is a bypass capacitor in the range of 0.1 µF to 1 µF.

+30V

R5

Vps 6.8µF

0.1µF

C5

R6

R1

C1

15nF

C2

VB

1 –VS

2 EXC 1

+VS 20

OFFSET 1 19

3 EXC 2

OFFSET 2 18

4 LEV 1

SIG REF 17

5 LEV 2

SIG OUT 16

6 FREQ 1 FEEDBACK 15

7 FREQ 2 OUT FILT 14

8 B1 FILT

A1 FILT 13

9 B2 FILT

A2 FILT 12

10 VB AD598 VA 11

R4

R3

R2

33k

C4

C3

SIGNAL

REFERENCE

RL

VOUT

equal in value. Note also a shunt capacitor across R2 shown as a

parameter (see Figure 7). The value of R2 used was 81 kΩ with

a Schaevitz E100 LVDT.

VA

SCHAEVITZ E100

LVDT

Figure 12. Interconnection Diagram for Single

Supply Operation

Gain Phase Characteristics

To use an LVDT in a closed loop mechanical servo application,

it is necessary to know the dynamic characteristics of the trans-

ducer and interface elements. The transducer itself is very quick

to respond once the core is moved. The dynamics arise prima-

rily from the interface electronics. Figures 13, 14 and 15 show

the frequency response of the AD598 LVDT Signal Condi-

tioner. Note that Figures 14 and 15 are basically the same; the

difference is frequency range covered. Figure 14 shows a wider

range of mechanical input frequencies at the expense of accu-

racy. Figure 15 shows a more limited frequency range with en-

hanced accuracy. The figures are transfer functions with the

input to be considered as a sinusoidally varying mechanical posi-

tion and the output as the voltage from the AD598; the units of

the transfer function are volts per inch. The value of C2, C3 and

C4, from Figure 7, are all equal and designated as a parameter

in the figures. The response is approximately that of two real

poles. However, there is appreciable excess phase at higher fre-

quencies. An additional pole of filtering can be introduced with

a shunt capacitor across R2, (see Figure 7); this will also in-

crease phase lag.

When selecting values of C2, C3 and C4 to set the bandwidth of

the system, a trade-off is involved. There is ripple on the “dc”

position output voltage, and the magnitude is determined by the

filter capacitors. Generally, smaller capacitors will give higher

system bandwidth and larger ripple. Figures 16 and 17 show the

magnitude of ripple as a function of C2, C3 and C4, again all

Figure 13. Gain and Phase Characteristics vs. Frequency

(0 kHz–10 kHz)

Figure 14. Gain and Phase Characteristics vs. Frequency

(0 kHz–50 kHz)

–8–

REV. A

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