HIP4086DEMO1Z データシートの表示（PDF） - Renesas Electronics

部品番号

コンポーネント説明

メーカー

HIP4086DEMO1Z

80V, 500mA, 3-Phase MOSFET Driver

Renesas Electronics 

HIP4086, HIP4086A

Typical Performance Curves (Continued)

6

RDEL = 100kΩ

4

2

RDEL = 10kΩ

0-60 -40 -20 0 20 40 60 80 100 120 140 160

JUNCTION TEMPERATURE (°C)

FIGURE 19. DEAD TIME

11.0

10.5

10.0

9.5

ENABLE (50kΩ, UVLO TO GND)

9.0

8.5

TRIP (50k, UVLO TO GND)

8.0

7.5 TRIP/ENABLE (0kΩ, UVLO TO VDD) ENABLE (UVLO OPEN)

7.0

TRIP (UVLO OPEN)

6.5

6.0-60 -40 -20 0 20 40 60 80 100 120 140 160

JUNCTION TEMPERATURE (°C)

FIGURE 20. UNDERVOLTAGE THRESHOLD

25

VxHS = 80V

20

15

10

-60 -40 -20 0 20 40 60 80 100 120 140 160

JUNCTION TEMPERATURE (°C)

FIGURE 21. IxHS LEAKAGE CURRENT

Functional Description

Input Logic

NOTE: When appropriate for brevity, input and output pins will be prefixed

with an “x” as a substitute for A, B, or C. For example, xHS refers to pins

AHS, BHS, and CHS.

The HIP4086/A are 3-phase bridge drivers designed specifically

for motor drive applications. Three identical half bridge sections,

A, B and C, can be controlled individually by their input pins, ALI,

AHI, BLI, BHI, and CLI, CHI (xLI, xHI) or the 2 corresponding input

pins for each section can be tied together to form a PWM input

(xLI connected to xHI = xPWM). When controlling individual

inputs, the programmable dead time is optional but

shoot-through protection must then be incorporated in the timing

of the input signals. If the PWM mode is chosen, then the internal

programmable dead time must be used.

Shoot-Through Protection

Dead time, to prevent shoot-through, is implemented by delaying

the turn-on of the high-side and low-side drivers. The delay timers

are enabled if the voltage on the RDEL pin is greater than

100mV. The voltage on RDEL will be greater than 100mV for any

value of programming resistor in the specified range. If the

voltage on RDEL is less than 100mV, the delay timers are

disabled and no shoot-through protection is provided by the

internal logic of the HIP4086/A. When the dead time is to be

disabled, RDEL should be shorted to VSS.

Refresh Pulse

To insure that the boot capacitors are charged prior to turning on

the high-side drivers, a refresh pulse is triggered when DIS is low

or when the UV comparator transitions low (VDD is greater than

the programmed undervoltage threshold). Please refer to the

“Block Diagram” on page 2. When triggered, the refresh pulse

turns on all of the low-side drivers (xLO = 1) and turns off all of

the high-side drivers (xHO = 0) for a duration set by a resistor tied

between RDEL and VSS. When xLO = 1, the low-side bridge FETs

charge the boot capacitors from VDD through the boot diodes.

FN4220 Rev 1.00

January 12, 2017

Page 10 of 17

Share Link: