CDB5364 データシートの表示（PDF） - Cirrus Logic

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CDB5364

Evaluation Board for CS5364

Cirrus Logic 

3.1.1

CDB5364

S1 and S4 Switch Operation

DIP Switch S1 contains six switches that function as described below.

M1,M0 set the device Speed Mode

0x00 Single Speed Master

0x01 Double Speed Master

0x10 Quad Speed Master

0x11 Slave all speed

DIF1,DIF0 set the Digital Audio Interface Data format

0x00 Left Justified

0x01 I²S

0x10 TDM 2-wire

0x11 TDM 4-wire

TDM1 and TDM0 support both TDM mode and PCM mode.

In TDM mode, TDM1 and TDM0 select two stereo pairs from a TDM stream, convert the data to Left-Jus-

tified PCM format then send the data to the CS8406 S/PDIF transmitter.

0x00 TDM Pair 1 (Channel 1, 2)

0x01 TDM Pair 2 (Channel 3, 4)

0x1x Reserved

In PCM mode, TDM1 and TDM0 select which SDOUT is sent to the CS8406.

0x00 SDOUT1 (Channel 1, 2)

0x01 SDOUT2 (Channel 3, 4)

0x1x Reserved

DIP Switch S4 contains two switches which function as described below.7

MDIV - divides the master clock by 2 when OPEN (HI).

CLKMODE - divides the master clock by 1.5 when OPEN (HI)

4

DS625DB1

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