CDB5364 データシートの表示（PDF） - Cirrus Logic

部品番号

コンポーネント説明

メーカー

CDB5364

Evaluation Board for CS5364

Cirrus Logic 

3.5 Bit Definitions

CDB5364

3.5.1

3.5.2

CS5364 Bits

The Low-Level view of the FlexGUI provides the full register set of the CS5364 under the CS5364 tab.

The CS5364 datasheet provides full details of internal register operation.

FPGA Bits

FPGA Register 0x00 is non-functional and only contains the revision code of the FPGA.

FPGA Register 0x01 is a functional register that provides the following functionality.

Figure 3. FPGA Low-Level Bit View

Fs_Range1,0 set the device Speed Mode. These bits need to be changed when using the Serial Audio

Interface of the DSP header to communicate with external equipment.

0x00 Single Speed Master

0x01 Double Speed Master

0x10 Quad Speed Master

0x11 Slave all speed

AudioFMT1,0 set the Serial Audio Interface format when attaching the Serial Audio Interface of the DSP

header to external equipment.

0x00 Left Justified

0x01 I²S

0x10 TDM 2-wire

0x11 TDM 4-wire

8

DS625DB1

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