EMP114-Q5 データシートの表示（PDF） - Excelics Semiconductor, Inc.
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EMP114-Q5 Datasheet PDF : 3 Pages
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UPDATED: 04/24/2008
Recommended Circuit Schematic:
Vd
22uF
0.1uF
EMP114-Q5
7.0 – 9.0 GHz Surface-Mounted PA
V V d1NC NC NC d2
0.1uF
Vd
22uF
NC
NC
RFin
NC
NC
EMP114 NC
-Q5
NC
RFout
NC
NC
Vg
22uF
V NC NC NC NC
g
0.1uF
Notes:
1)
2)
3)
External bypass capacitors should be placed as close to the package as possible.
Dual biasing sequence required:
a. Turn-on Sequence: Apply Vg = -2.5V, followed by Vd = 7V, lastly increase Vg until required Idq
b. Turn-off Sequence: Turn off Vd, followed by Vg
Demonstration board available upon request.
Specifications are subject to change without notice.
Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085
Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com
Page 3 of 3
May 2008
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