FS6370 データシートの表示（PDF） - AMI Semiconductor

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FS6370

EEPROM Programmable 3-PLL Clock Generator IC

AMI Semiconductor 

FS6370-01

EEPROM Programmable 3-PLL Clock Generator IC

Table 5: Power-Down Bits, continued

NAME

PDPOST_A

(Bit 120)

PDPOST_B

(Bit 121)

PDPOSTC

(Bit 122)

PDPOSTD

(Bit 123)

DESCRIPTION

Power-Down POST divider A

Bit = 0

Power On

Bit = 1

Power Off

Power-Down POST divider B

Bit = 0

Power On

Bit = 1

Power Off

Power-Down POST divider C

Bit = 0

Power On

Bit = 1

Power Off

Power-Down POST divider D

Bit = 0

Power On

Bit = 1

Power Off

Table 6: Divider Control Bits

NAME

DESCRIPTION

REFDIV_A[7:0]

(Bits 7-0)

REFDIV_B[7:0]

(Bits 31-24)

REFDIV_C1[7:0]

(Bits 55-48)

REFDIV_C2[7:0]

(Bits 79-72)

FBKDIV_A[10:0]

(Bits 18-8)

REFerence DIVider A (NR)

REFerence DIVider B (NR)

REFerence DIVider C1 (NR)

selected when the SEL_CD pin = 0

REFerence DIVider C2 (NR)

selected when the SEL_CD pin = 1

FeedBacK DIVider A (NF)

FBKDIV_A[2:0]

A-Counter Value

FBKDIV_A[10:3] M-Counter Value

FBKDIV_B[10:0]

(Bits 42-32)

FeedBacK DIVider B (NF)

FBKDIV_B[2:0]

A-Counter Value

FBKDIV_B[10:3] M-Counter Value

FBKDIV_C1[10:0]

(Bits 66-56)

FeedBacK DIVider C1 (NF)

selected when the SEL_CD pin = 0

FBKDIV_C1[2:0] A-Counter Value

FBKDIV_C1[10:3] M-Counter Value

FBKDIV_C2[10:0]

(Bits 90-80)

FeedBacK DIVider C2 (NF)

selected when the SEL_CD pin = 1

FBKDIV_C2[2:0] A-Counter Value

FBKDIV_C2[10:3] M-Counter Value

Table 7: Post Divider Control Bits

NAME

POST_A[3:0]

(Bits 99-96)

POST_B[3:0]

(Bits 103-100)

POST_C1[3:0]

(Bits 107-104)

POST_C2[3:0]

(Bits 115-112)

POST_D1[3:0]

(Bits 111-108)

POST_D2[3:0]

(Bits 119-116)

DESCRIPTION

POST divider A (see Table 8)

POST divider B (see Table 8)

POST divider C1 (see Table 8)

selected when the SEL_CD pin = 0

POST divider C2 (see Table 8)

selected when the SEL_CD pin = 1

POST divider D1 (see Table 8)

selected when the SEL_CD pin = 0

POST divider D2 (see Table 8)

selected when the SEL_CD pin = 1

Table 8: Post Divider Modulus

BIT [3]

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

BIT [2]

0

0

0

0

1

1

1

1

0

0

0

0

1

1

1

1

BIT [1]

0

0

1

1

0

0

1

1

0

0

1

1

0

0

1

1

BIT [0]

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

DIVIDE BY

1

2

3

4

5

6

8

9

10

12

15

16

18

20

25

50

11

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