DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

74VHC175 データシートの表示(PDF) - ON Semiconductor

部品番号
コンポーネント説明
メーカー
74VHC175
ON-Semiconductor
ON Semiconductor ON-Semiconductor
74VHC175 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
74VHC175
Quad D-Type Flip-Flop
May 2007
tm
Features
High Speed: fMAX = 210MHz (Typ.) at VCC = 5V
Low power dissipation: ICC = 4µA (Max.) at TA = 25°C
High noise immunity: VNIH = VNIL = 28% VCC (Min.)
Power down protection is provided on all inputs
Low noise: VOLP = 0.8V (Max.)
Pin and function compatible with 74HC175
General Description
The VHC175 is an advanced high-speed CMOS device
fabricated with silicon gate CMOS technology. It
achieves the high-speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low
power dissipation.
The VHC175 is a high-speed quad D-type flip-flop. The
device is useful for general flip-flop requirements where
clock and clear inputs are common. The information on
the D inputs is stored during the LOW-to-HIGH clock
transition. Both true and complemented outputs of each
flip-flop are provided. A Master Reset input resets all flip-
flops, independent of the Clock or D inputs, when LOW.
An input protection circuit insures that 0V to 7V can be
applied to the input pins without regard to the supply
voltage. This device can be used to interface 5V to 3V
systems and two supply systems such as battery
backup. This circuit prevents device destruction due to
mismatched supply and input voltages.
Ordering Information
Order Number
74VHC175M
74VHC175SJ
74VHC175MTC
Package
Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the
ordering number.
Connection Diagram
Pin Description
Pin Names
D0–D3
CP
MR
Q0–Q3
Q0–Q 3
Description
Data Inputs
Clock Pulse Input
Master Reset Input
True Outputs
Complement Outputs
©1993 Fairchild Semiconductor Corporation
74VHC175 Rev. 1.2
www.fairchildsemi.com

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]