74LVC1G53GT データシートの表示（PDF） - Nexperia B.V. All rights reserved

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74LVC1G53GT

2-channel analog multiplexer/demultiplexer

Nexperia B.V. All rights reserved 

74LVC1G53

2-channel analog multiplexer/demultiplexer

Rev. 11 — 16 January 2018

Product data sheet

1 General description

The 74LVC1G53 is a low-power, low-voltage, high-speed, Si-gate CMOS device.

The 74LVC1G53 provides one analog multiplexer/demultiplexer with a digital select input

(S), two independent inputs/outputs (Y0 and Y1), a common input/output (Z) and an

active LOW enable input (E). When pin E is HIGH, the switch is turned off.

Schmitt trigger action at the select and enable inputs makes the circuit tolerant of slower

input rise and fall times across the entire VCC range from 1.65 V to 5.5 V.

2 Features and benefits

• Wide supply voltage range from 1.65 V to 5.5 V

• Very low ON resistance:

– 7.5 Ω (typical) at VCC = 2.7 V

– 6.5 Ω (typical) at VCC = 3.3 V

– 6 Ω (typical) at VCC = 5 V

• Switch current capability of 32 mA

• High noise immunity

• CMOS low power consumption

• TTL interface compatibility at 3.3 V

• Latch-up performance meets requirements of JESD 78 Class I

• ESD protection:

– HBM JESD22-A114F exceeds 2000 V

– MM JESD22-A115-A exceeds 200 V

– CDM JESD22-C101E exceeds 1000 V

• Control inputs accept voltages up to 5 V

• Multiple package options

• Specified from -40 °C to +85 °C and from -40 °C to +125 °C

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