DS2196 データシートの表示（PDF） - Maxim Integrated

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DS2196

T1 Dual Framer LIU

Maxim Integrated 

2. PIN DESCRIPTION

DS2196

Table 2-1. Pin Description Sorted by Pin Number

PIN

SYMBOL

1

PCLK

2

PNRZ

3

WCLK

4

WNRZ

5

JTMS

6

JTCLK

7

JTRST*

8

JTDI

9

JTDO

10 RCL

11 LNRZ

12 LCLK

13 LFSYNC

14 RPOSLO

15 RNEGLO

16 RCLKLO

17 BTS

18 RTIP

19 RRING

20 RVDD

21 RVSS

22 INT*

23 RVSS

24 MCLK

25 UOP3

26 UOP2

27 UOP1

28 UOP0

29 TTIP

30 TVSS

31 TVDD

32 TRING

33 TPOSLI

34 TNEGLI

35 TCLKLI

36 TCHBLKB/

TLINKB

37 TCHCLKB/

TLCLKB

38 TSYNCB

39 TCLKB

40 TSERB

41 TPOSOB/

TNRZB

42 TNEGOB /

TFSYNCB

TYPE

I

I

I

I

I

I

I

I

O

O

O

O

O

O

O

O

I

I

I

–

–

O

–

I

O

O

O

O

O

–

–

O

I

I

I

I/O

O

I/O

I

I

O

O

FUNCTION

Protect Clock Input.

Protect NRZ Data Input.

Working Clock Input.

Working NRZ Data Input.

IEEE 1149.1 Test Mode Select.

IEEE 1149.1 Test Clock Signal.

IEEE 1149.1 Test Reset.

IEEE 1149.1 Test Data Input.

IEEE 1149.1 Test Data Output.

Receive LIU Carrier Loss.

LIU NRZ & Positive Data Output.

LIU Clock Output.

LIU Frame Sync Pulse & Negative Data Output.

Receive Positive & NRZ Data Output from the LIU.

Receive Negative & NRZ Data Output from the LIU.

Receive Clock Output from the LIU.

Bus Type Select. 0 = Intel / 1 = Motorola.

Receive Analog Tip Input.

Receive Analog Ring Input.

Receive Analog Positive Supply. 3.3V (±5%).

Receive Analog Signal Ground.

Interrupt. Open Drain. Active Low Signal.

Receive Analog Signal Ground.

Master Clock Input. 1.544 MHz (±50 ppm).

User Defined Output Port Bit 3.

User Defined Output Port Bit 2.

User Defined Output Port Bit 1.

User Defined Output Port Bit 0.

Transmit Analog Tip Output.

Transmit Analog Signal Ground.

Transmit Analog Positive Supply. 3.3V (±5%).

Transmit Analog Ring Output.

Transmit Positive & NRZ Data for the LIU.

Transmit Negative & NRZ Data for the LIU.

Transmit Clock Input for the LIU.

Transmit Channel Blocking Clock Output from Formatter B /

Transmit FDL Link Data Input for Formatter B.

Transmit DS0 Channel Clock Output from Formatter B /

Transmit FDL Link Clock Output from Formatter B.

Transmit Frame & Multiframe Pulse for/from Formatter B.

Transmit Clock Input for Formatter B.

Transmit Serial Data Input for Formatter B.

Transmit Positive Data Output from Formatter B /

Transmit NRZ Data Output from Formatter B.

Transmit Negative Data Output from Formatter B /

Transmit Frame Sync Pulse Output from Formatter B.

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