DS2761BE(2003) データシートの表示（PDF） - Maxim Integrated

部品番号

コンポーネント説明

メーカー

DS2761BE
(Rev.:2003)

High-Precision Li+ Battery Monitor

Maxim Integrated 

Table 1. DETAILED PIN DESCRIPTION

DS2761

SYMBOL TSSOP FLIP

DESCRIPTION

CHIP

CC

1

C1 Charge Protection Control Output. Controls an external p-channel

high-side charge protection FET.

DC

3

B2 Discharge Protection Control Output. Controls an external p-channel

high-side discharge protection FET.

DQ

7

B4 Data Input/Out. 1-Wire data line. Open-drain output driver. Connect

this pin to the DATA terminal of the battery pack. Pin has an internal

1mA pull-down for sensing disconnection.

PIO

14

E2 Programmable I/O Pin. Used to control and monitor user-defined

external circuitry. Open drain to VSS.

PLS

2

B1 Battery Pack Positive Terminal Input. The DS2761 monitors the pack

plus terminal through PLS to detect overcurrent and overload conditions,

as well as the presence of a charge source. Additionally, a charge path to

recover a deeply depleted cell is provided from PLS to VDD. In sleep

mode (with SWEN = 0), any capacitance or voltage source connected to

PLS is discharged internally to VSS through 200mA (nominal) to assure

reliable detection of a valid charge source. For details of other internal

connections to PLS and associated conditions see the Li+ Protection

Circuitry section.

PS

10

E4 Power Switch Sense Input. The device wakes up from Sleep Mode

when it senses the closure of a switch to VSS on this pin. Pin has an

internal 1mA pull-up to VDD.

VIN

16

D1 Voltage Sense Input. The voltage of the Li+ cell is monitored via this

input pin. This pin has a weak pullup to VDD.

VDD

15

E1 Power Supply Input. Connect to the positive terminal of the Li+ cell

through a decoupling network.

VSS

13,14,

F3 Device Ground. Connect directly to the negative terminal of the Li+ cell.

15

For the external sense resistor configuration, connect the sense resistor

between VSS and SNS.

SNS

4,5,6

A3 Sense Resistor Connection. Connect to the negative terminal of the

battery pack. In the internal sense resistor configuration, the sense resistor

is connected between VSS and SNS.

IS1

9

D4 Current Sense Input. This pin is internally connected to VSS through a

4.7kW resistor. Connect a 0.1mF capacitor between IS1 and IS2 to

complete a low-pass input filter.

IS2

8

C4 Current Sense Input. This pin is internally connected to SNS through a

4.7kW resistor.

SNS

N/A

C2 Do Not Connect.

Probe

VSS

N/A

D2 Do Not Connect.

Probe

4 of 24

Share Link: