12028IBZ データシートの表示（PDF） - Renesas Electronics

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12028IBZ

Real Time Clock/Calendar with I2C Bus™ and EEPROM

Renesas Electronics 

ISL12028, ISL12028A

Timing Diagrams

SCL

tSU:STA

SDA

(INPUT TIMING)

SDA

(OUTPUT TIMING)

tF

tSU:DAT

tHD:STA

tHIGH

tLOW

tR

tHD:DAT

tAA

tDH

FIGURE 1. BUS TIMING

tHD:STO

tSU:STO

tBUF

SCL

SDA

8TH BIT OF LAST BYTE

ACK

STOP

CONDITION

FIGURE 2. WRITE CYCLE TIMING

tWC

START

CONDITION

SCL

SDA

tRSP

tRSP<tWDO

tRSP>tWDO

tRST

tRSP>tWDO

tRST

RESET

START

STOP START

Note: All inputs are ignored during the active reset period (tRST).

FIGURE 3. WATCHDOG TIMING

VDD

VRESET

tPURST

tR

RESET

FN8233 Rev 10.00

August 14, 2015

tRPD

tPURST

FIGURE 4. RESET TIMING

tF

VRVALID

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