5962-9458504H5A データシートの表示（PDF） - Micross Components

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メーカー

5962-9458504H5A

128K x 32 EEPROM EEPROM Memory Array

Micross Components 

EEPROM

AS8E128K32

Software Data Protection Enable

Algorithm(1)

Software Data Protection Disable

Algorithm(1)

Load Data AA

to

Address 5555

Load Data >AA

Address >5555

Load Data 55

to

Address 2AAA

Load Data A0

to

Address 5555

Load Data XX

to

Any Address(4)

Writes Enabled(2)

Load Data >55

Address >2AAA

Load Data >80

Address >5555

Load Data >AA

Address >5555

Load Data >55

Address >2AAA

Load Last Byte

to

Last Address

Enter Data

Protect State

Load Data >20

Address >5555

NOTES:

1. Byte Data Format: I/O7 - I/O0, I/

Address Format: A14 - A0 (Hex)

2. Write Protect state will be active at end of write even if no other

data is loaded.

3. Write Protect state will be deactivated at end of period even if no

other data is loaded.

4. 1 to 128 bytes of data are loaded.

Load Data XX

Any Address (4)

LoLaodadLaLsatsBt Bytyet(es()s)

Last Address

;Exit Data Protect State(3)

SOFTWARE PROTECTED PROGRAM CYCLE WAVEFORM(1)(2)(3)

OE\

CE\

tWP

WE\

tAS

tAH

A0-A6

tWPH

BYTE ADDRESS

tBLC

A7-A16

5555

2AAA

5555

PAGE ADDRESS

tDS tDH

D ATA

AA

55

A0

BYTE 0

BYTE 126 BYTE 127

tWC

1. A0-A14 of the selected I/O bytes must conform to the addressing sequence for the first three bytes as shown above.

2. After the command sequence has been issued and a page write operation follows, the page address inputs (A7-A16) of the selected I/O bytes must be the same for each high to low transition

of WE\ (or CE\).

3. OE Must be high only when WE\ and CE\ are both low.

AS8E128K32

Rev. 8.2 07/10

Micross Components reserves the right to change products or specifications without notice.

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