DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ISL8009A データシートの表示(PDF) - Renesas Electronics

部品番号
コンポーネント説明
メーカー
ISL8009A Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ISL8009A
Electrical Specifications Typical specifications are measured at the following conditions: TA = +25°C, EN = VIN, RSI = SKIP = 0V, VIN = 5V,
L = 2.2µH, C1 = C2 = 20µF, IOUT = 0A to 1.5A. See “Typical Applications” on page 9.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 7) TYP (Note 7) UNITS
POR
Output Low Voltage
Sinking 1mA, VFB = 0.7V
-
-
0.3
V
Delay Time
-
2
-
ms
POR Pin Leakage Current
POR = VIN = 3.6V
- 0.01 0.1 µA
Minimum Supply Voltage for Valid POR Signal
1.2
-
-
V
Internal PGOOD Low Rising Threshold
Percentage of nominal regulation voltage
89.5 92 94.5 %
Internal PGOOD Low Falling Threshold
Percentage of nominal regulation voltage
85 88 91
%
Internal PGOOD High Rising Threshold
Percentage of nominal regulation voltage
108 112 114 %
Internal PGOOD High Falling Threshold
Percentage of nominal regulation voltage
104 107 110 %
Internal PGOOD Delay Time
-
6.5
-
µs
EN, SKIP, RSI
Logic Input Low
-
-
0.4
V
Logic Input High
1.4
-
-
V
Logic Input Leakage Current
Pulled up to 5.5V
-
0.1
1
µA
Thermal Shutdown
- 140 -
°C
Thermal Shutdown Hysteresis
-
25
-
°C
NOTES:
6. Limits established by characterization and are not production tested.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Pin Descriptions
VIN
Input supply voltage. Connect a 10µF ceramic capacitor to power
ground.
EN
Regulator enable pin. Enable the output when driven to high.
Shutdown the chip and discharge output capacitor when driven to
low. Do not leave this pin floating.
POR
2ms timer output. At power-up or EN HI, this output is a 2ms
delayed Power-Good signal for the output voltage. This output can
be reset by a low RSI signal. 2ms starts when RSI goes to high.
SKIP
Mode Selection pin. Connect to logic high or input voltage VIN for
PFM mode; connect to logic low or ground for forced PWM mode.
Do not leave this pin floating.
VFB
Buck regulator output feedback. Connect to the output through a
resistor divider for adjustable output voltage (ISL8009A-ADJ). For
preset output voltage, connect this pin to the output.
RSI
This input resets the 2ms timer. When the output voltage is within
the PGOOD window, an internal timer is started and generates a
POR signal 2ms later when RSI is low. A high RSI resets POR and
RSI high to low transition restarts the internal counter if the
output voltage is within the window, otherwise the counter is reset
by the output voltage condition.
Exposed Pad
The exposed pad must be connected to the GND pin for proper
electrical performance. The exposed pad must also be connected
to as much as possible for optimal thermal performance.
LX
Switching node connection. Connect to one terminal of inductor.
GND
System ground.
FN6656 Rev 3.00
February 28, 2013
Page 4 of 13

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]