LTC1661CMS8 データシートの表示（PDF） - Linear Technology
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LTC1661CMS8 Datasheet PDF : 14 Pages
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LTC1661
OPERATION
Table 2. DAC Control Functions
CONTROL
INPUT REGISTER
A3 A2 A1 A0
STATUS
0000
No Change
0001
Load DAC A
0010
Load DAC B
0011
0100
0101
0110
0111
1000
No Change
1001
Load DAC A
1010
Load DAC B
1011
1100
1101
No Change
1110
No Change
1 1 1 1 Load DACs A, B with
Same 10-Bit Code
DAC REGISTER
STATUS
No Update
No Update
No Update
Reserved
Reserved
Reserved
Reserved
Reserved
Update Outputs
Update Outputs
Update Outputs
Reserved
Reserved
No Update
No Update
Update Outputs
POWER-DOWN STATUS
(SLEEP/WAKE) COMMENTS
No Change
No Operation. Power-Down Status Unchanged
(Part Stays in Wake or Sleep Mode)
No Change
Load Input Register A with Data. DAC Outputs
Unchanged. Power-Down Status Unchanged
No Change
Load Input Register B with Data. DAC Outputs
Unchanged. Power-Down Status Unchanged
Wake
Wake
Wake
Wake
Sleep
Wake
Load Both DAC Regs with Existing Contents of Input
Regs. Outputs Update. Part Wakes Up
Load Input Reg A. Load DAC Regs with New Contents
of Input Reg A and Existing Contents of Reg B. Outputs
Update. Part Wakes Up
Load Input Reg B. Load DAC Regs with Existing
Contents of Input Reg A and New Contents of Reg B.
Outputs Update. Part Wakes Up
Part Wakes Up. Input and DAC Regs Unchanged. DAC
Outputs Reflect Existing Contents of DAC Regs
Part Goes to Sleep. Input and DAC Regs Unchanged.
DAC Outputs Set to High Impedance State
Load Both Input Regs. Load Both DAC Regs with New
Contents of Input Regs. Outputs Update. Part Wakes Up
SCK
DIN
CS/LD
1
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
A3 A2 A1 A0 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X1 X0
CONTROL CODE
(SCK ENABLED)
INPUT CODE
INPUT WORD W0
DON’T CARE
Figure 1. Register Loading Sequence
(LTC1661
RESPONDS) 1661 F01
1661fa
9
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