MPC9772 データシートの表示（PDF） - Integrated Device Technology
部品番号
コンポーネント説明
メーカー
MPC9772 Datasheet PDF : 17 Pages
| |||
MPC9772 Data Sheet
3.3V 1:12 LVCMOS PLL CLOCK GENERATOR
Table 9. DC Characteristics (VCC = 3.3 V ± 5%, TA = -40° to 85°C)
Symbol
Characteristics
Min
Typ
Max
Unit
Condition
VCC_PLL
VIH
VIL
VOH
VOL
PLL Supply Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
ZOUT
IIN
Output Impedance
Input Current(2)
3.0
VCC
V LVCMOS
2.0
VCC + 0.3
V LVCMOS
0.8
V LVCMOS
2.4
V IOH = –24 mA(1)
0.55
0.30
V IOL = 24 mA
V IOL = 12 mA
14 – 17
200
A VIN = VCC or
GND
ICC_PLL
ICCQ
Maximum PLL Supply Current
Maximum Quiescent Supply Current
3.0
5.0
mA VCC_PLL Pin
15
mA All VCC Pins
1. The MPC9772 is capable of driving 50 transmission lines on the incident edge. Each output drives one 50 parallel terminated
transmission line to a termination voltage of VTT. Alternatively, the device drives up to two 50 series terminated transmission lines.
2. Inputs have pull-down resistors affecting the input current.
Table 10. AC Characteristics (VCC = 3.3 V ± 5%, TA = –40° to +85°C)(1), (2), continued on next page
Max
Unit
Symbol
Characteristics
Min
Typ
TA = 0°C TA = –40°C
to +70°C to +85°C
Condition
fREF Input reference frequency
4 feedback
50.0
6 feedback
33.3
8 feedback
25.0
10 feedback
20.0
12 feedback
16.6
16 feedback
12.5
20 feedback
10.0
24 feedback
8.33
32 feedback
6.25
40 feedback
5.00
120.0
80.0
60.0
48.0
40.0
30.0
24.0
20.0
15.0
12.0
115.00
76.67
57.50
46.00
38.33
28.75
23.00
19.16
14.37
11.50
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
PLL locked
Input reference frequency in PLL bypass mode(3)
fVCO
fXTAL
fMAX
VCO frequency range(4)
Crystal interface frequency range(4)
Output Frequency
2 output
4 output
6 output
8 output
10 output
12 output
16 output
20 output
24 output
fSTOP_CLK Serial interface clock frequency
tPW,MIN Input Reference Pulse Width(5)
tR, tF CCLKx Input Rise/Fall Time(6)
200
10
100.0
50.0
33.3
25.0
20.0
16.6
12.5
10.0
8.33
2.0
250
250
480
460
25
240.0
120.0
80.0
60.0
48.0
40.0
30.0
24.0
20.0
230.00
115.00
76.67
57.50
46.00
38.33
28.75
23.00
19.16
20
1.0
MHz PLL bypass
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
PLL locked
MHz
ns
ns 0.8 to 2.0 V
MPC9772 REVISION 7 JANUARY 8, 2013
6
©2013 Integrated Device Technology, Inc.
Share Link: 