S6B2104 データシートの表示（PDF） - Samsung
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S6B2104 Datasheet PDF : 12 Pages
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S6B2104
NOTES:
1.
80CH SEGMENT DRIVER FOR DOT MATRIX LCD
Display
data input
Display data input pins for 4 bit parallel shift register and it is input
synchronized with the clock pulse. The combination of D0-D3 level, M
signal, display data output level and the display on the LCD panel is
described on the table below. (DISPOFFB = H)
D0-D3 M Display Data Output Level
Display on the LCD
L
L
V3
OFF
H
L
V1
ON
L
H
V4
OFF
H
H
VEE
ON
Controller
VDD
C
V1
C
R
V2 (to S6B0103)
R
C
V3
VDD
S1 - S80
R
C
V4 S6B2104
R
C
V5 (to S6B0103)
C
VEE
VSS
To LCD Panel
V1, VEE
V3, V4
Selected Level
Nonselected Level
n = 5 (1/64 duty) to 13 (1/256 duty)
2.
M
L
L
H
H
X
X: Dont’ care.
Latched Data
L
H
L
H
X
DISPOFFB
H
H
H
H
L
Output level (S1- S80)
V3
V1
V4
VEE
V1
10
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