UT62V5128LC-100LI データシートの表示（PDF） - Utron Technology Inc
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UT62V5128LC-100LI Datasheet PDF : 10 Pages
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Rev. 1.0
UTRON
FEATURES
Access time : 70/100ns(max)
CMOS Low operating power
Operating : 30/20mA (Icc max)
Standby : 20µA (TYP.) L-version
2µA (TYP.) LL-version
Single 2.3V~2.7V power supply
Operating Temperature:
Industrial : -40℃~85℃
All inputs and outputs TTL compatible
Fully static operation
Three state outputs
Data retention voltage : 1.5V (min)
Package : 32-pin 8mm×20mm TSOP-I
32-pin 8mm×13.4mm STSOP
FUNCTIONAL BLOCK DIAGRAM
UT62V5128(I)
512K X 8 BIT LOW POWER CMOS SRAM
GENERAL DESCRIPTION
The UT62V5128(I) is a 4,194,304-bit high speed
CMOS static random access memory organized
as 524,288 words by 8 bits. It is fabricated using
high performance, high reliability CMOS
technology.
The UT62V5128(I) is designed for high speed
system applications. It is particularly well suited
for battery back-up nonvolatile memory
applications.
The UT62V5128(I) operates from a single
2.3V~2.7V power supply and all inputs and
outputs are fully TTL compatible.
PIN CONFIGURATION
A0
A1
A2
A3
A4
.
A8
A13
ROW
. DECODER
A14
.
A15
A16
A17
I/O1
...
... I/O
CONTROL
I/O8
...
MEMORY ARRAY
2048 ROWS × 256 COLUMNS × 8bits
. ..
COLUMN I/O
COLUMN DECODER
A11
1
A9
2
A8
3
A13
4
WE
5
VCC A17
6
A15
7
Vcc
8
VSS A18
9
A16 10
A14 11
A12 12
A7
13
A6
14
A5
15
A4
16
CE
LOGIC
WE CONTROL
OE
A18A12 A11 A10 A9 A7 A6 A5
PIN DESCRIPTION
SYMBOL
A0 - A18
I/O1 - I/O8
CE
WE
OE
Vcc
Vss
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
UT62V5128
TSOP-1 / STSOP
32
OE
31 A10
30
CE
29 I/O8
28
I/O7
27
I/O6
26
I/O5
25
I/O4
24
Vss
23
I/O3
22
I/O2
21
I/O1
20
A0
19
A1
18
A2
17
A3
UTRON TECHNOLOGY INC.
1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C.
TEL: 886-3-5777882 FAX: 886-3-5777919
1
P80068
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