SFH6318T データシートの表示（PDF） - Infineon Technologies
部品番号
コンポーネント説明
メーカー
SFH6318T Datasheet PDF : 3 Pages
| |||
Electro-Optical Characteristics (TA=0°C to 70°C, TA=25°C—Typical, unless otherwise specified)
Parameter
Symbol Device
Min Typ Max Units Test Conditions
Note
Current Transfer Ratio
Logic Low
Output Voltage
Logic High
Output Current
Logic Low Supply Current
Logic High Supply Current
Input Forward Voltage
Temperature Coefficient,
Forward Voltage
CTR
—
V OL
—
IOH
ICCL
ICCH
VF
∆VF/∆TA
SFH6318T 300
SFH6319T 400
500
SFH6318T —
SFH6319T
SFH6318T —
SFH6319T —
—
—
—
—
—
—
—
—
1600
2000
1600
0.1
0.1
0.15
0.25
0.1
0.05
0.2
0.01
1.4
–1.8
2600
3500
2600
0.4
0.4
0.4
0.4
250
100
1.5
10
1.7
—
%
IF=1.6 mA, VO=0.4 V, VCC=4.5 V 1,2
IF=0.5 mA, VO=0.4 V, VCC=4.5 V
IF=1.6 mA, VO=0.4 V, VCC=4.5 V
V
IF=1.6 mA, IO=4.8 mA, VCC=4.5 V 2
IF=1.6 mA, IO=8.0 mA, VCC=4.5 V
IF=5.0 mA, IO=15 mA, VCC=4.5 V
IF=12 mA, IO=24 mA, VCC=4.5 V
µA
IF=0 mA, VO=VCC=7.0 V
IF=0 mA, VO=VCC=18 V
mA
IF=1.6 mA, VO=OPEN, VCC=18 V
µA
IF=0 mA, VO=OPEN, VCC=18 V
V
IF=1.6 mA, TA=25°C
—
mV/°C IF=1.6 mA
Input Capacitance
CIN
—
— 25
—
pF
f=1.0 MHz, VF=0
Resistance (Input-Output)
RI-O
—
— 1012 —
Ω
1011
VIO=500 VDC, TA=25°C
VIO=500 VDC, TA=100°C
3
Capacitance (Input-Output) CI-O
—
— 0.6
—
pF
f=1.0 MHz
3
Switching Specifications (TA=25°C)
Parameter
Symbol Device
Min Typ
Max Units Test Conditions
Note
Propagation Delay Time
To Logic Low at Output
tPHL
SFH6318T — 2.0
10
µs
IF=1.6 mA, RL=2.2 kΩ
SFH6319T — 6.0
25
0.6
1.0
IF=0.5 mA, RL=4.7 kΩ
2,4
IF=12 mA, RL=270 Ω
Propagation Delay Time
To Logic High at Output
tPLH
SFH6318T — 2.0
35
SFH6319T — 4.0
60
1.5
7.0
IF=1.6 mA, RL=2.2 kΩ
—
IF=0.5 mA, RL=4.7 kΩ
2,4
IF=12 mA, RL=270 Ω
Common Mode Transient Immunity | CMH | —
at Logic High Level Output
— 1K
—
V/µs IF=0 mA, RL=2.2 kΩ
5,6
VCM=10 VP–P
Common Mode Transient Immunity | CML|
—
—
—
at Logic Low Level Output
IF=1.6 mA, RL=2.2 kΩ
VCM=10 VP–P
Notes
1. DC current transfer ratio is defined as the ratio of output collector current, IO, to the forward LED input current, IF times 100%.
2. Pin 7 open.
3. Device considered a two-terminal device: pins 1, 2, 3 and 4 shorted together and pins 5, 6, 7 and 8 shorted together.
4. Using a resistor between pin 5 and 7 will decrease gain and delay time.
5. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the common mode
pulse, VCM, to assure that the output will remain in a logic high state (i.e. VO>2.0 V) common mode transient immunity in logic low level is the
maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal, VCM, to assure that the output will remain in a logic
low state (i.e. VO<0.8 V).
6. In applications where dv/dt may exceed 50,000 V/µs (such as state discharge) a series resistor, RCC should be included to protect IC from
destructively high surge currents. The recommended value is
Refer to Figure 2.
RCC ≅ 0--.--1---5----I--FI--V---(--m-----A-----)kΩ
2001 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
2–283
SFH6318T/6319T
March 11, 2000-20
Share Link: 