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ST72P611F1B1 データシートの表示(PDF) - STMicroelectronics

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ST72P611F1B1 Datasheet PDF : 71 Pages
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ST7261
1 INTRODUCTION
The ST7261, ST72P61 and ST72F61 devices are
members of the ST7 microcontroller family de-
signed for USB applications.
All devices are based on a common industry-
standard 8-bit core, featuring an enhanced instruc-
tion set.
The ST7261 ROM and ST72P61 FASTROM (Fac-
tory Advanced Service Technique ROM) devices
are factory-programmed and are not reprogram-
mable.
The ST72F61 versions feature dual-voltage
FLASH memory with In-Circuit Programming (ICP)
capability.
Figure 1. General Block Diagram
Under software control, all devices can be placed
in WAIT, SLOW, or HALT mode, reducing power
consumption when the application is in idle or
standby state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
OSCI N
OSCOU T
VDD
VSS
RES ET
VPP
OSCILLATOR
Internal
CLOCK
LVD
POWER
SUPPL Y
CONTROL
8-BIT CORE
ALU
USB DMA
PROGRAM
MEMORY
(4 KBytes)
RAM
(256 Bytes)
PORT A
PORT B
TIME BASE UNIT
USB SIE
WAT CHDOG
PA2:0
(3 bits)
PB7:0
(8 bits)
USBD P
USBDM
USB VCC
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