M62254FP データシートの表示（PDF） - Renesas Electronics
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M62254FP Datasheet PDF : 12 Pages
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M62254FP
(3) Watchdog timer
5V
VTH + ∆VTH
VDD
0V
2.7 V
TC
0.2 V
0V
WD
0V
RESET
0V
tRT (1)
td
tRT (2)
tWD
(1) (2)
(3) (4)
tWDIN
(5)
(6) (7)
VTH
(8)
(9)
(1)
(2) (3)
(4)
(5) (6)
(7) (8)
(9)
When VDD reaches 4.75 V (VTH1 + ∆VTH1); after fixed amount of time (td), Reset pin outputs "High" and
begin charging of the capacitor connected TC pin.
When TC pin reaches 2.7 V (VTH2 (H)); the capacitor connected TC pin begin discharge, and the Reset pin
outputs "Low". During the Reset outputs "High" for the first time; the time of charge will be tWD + tRT (1),
since TC pin begin charging its capacitor starting from 0 V.
When TC pin drops to 0.2 V (VTH2 (L)); the Reset will outputs "High" again. At same time, TC pin will begin
charging again. Unless correct clock input is given to WD pin, the TC pin will repeats the charging from 0.2
V to 2.7 V, and the Reset will also repeats "High" during the tWD cycle, and "Low" during tRT (2) cycle.
When correct clock input is given to WD pin before TC pin reaches 2.7 V, the Reset holds "High" output.
When incorrect clock is given to WD pin, the TC pin will repeats the charging from 0.2 V to 2.7 V, and the
Reset will also repeats "High" during the tWD cycle, and "Low" during tRT (2) cycle.
When VDD drops down to 4.25 V (VTH1), the Reset circuit will function, and it will output "Low" to Reset pin
and TC pin changes to discharging state.
(4) Reset circuit
∆VTH1
VTH1
VDD
0.65
RESET
Output
td
(1)
td
(2) (3)
(1) When VDD reaches 4.75 V (VTH1 + ∆VTH1), the Reset outputs "High" after fixed amount of time (td).
(2) When VDD drops below 4.25 V (VTH1), the Reset outputs "Low".
(3) When VDD reaches 4.75 V (VTH1 + ∆VTH1) again, the Reset outputs "High" after fixed amount of time (td). Also,
Reset output will be "Low" until VDD reaches 0.65 V (Typ).
REJ03F0244-0200 Rev.2.00 Jun 16, 2008
Page 8 of 11
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