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L9805E(2013) データシートの表示(PDF) - STMicroelectronics

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L9805E Datasheet PDF : 125 Pages
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L9805E
General description
PA5/OCMP2_2-PA6/OCMP1_2: I/Os or Output Compares on Timer 2. Alternate function
software selectable (by setting OC2E or OC1E in CR2 register: bit 6 or 7 at 0041h). When
used as alternate functions, these pins are push-pull outputs as requested by Timer 2.
Otherwise, these pins are triggered floating inputs or push-pull outputs.
PA7/ICAP2_2-PB0/ICAP1_2: I/Os or Input Captures on Timer 2. Before using these I/Os as
alternate inputs, they must be configured by software in input mode (DDR=0). In this case,
these pins are triggered floating inputs. Otherwise (I/O function), these pins are triggered
floating inputs or push-pull outputs.
PB1/EXTCLK_2: PB1 I/O or External Clock on Timer 2. Before using this I/O as alternate
input, it must be configured by software in input mode (DDR=0). In this case, this pin is a
triggered floating input. Otherwise (I/O function), this pin is a triggered floating input or a
push-pull output.
VPP/TM: Input. This pin must be held low during normal operating modes.
VDD: Output. 5V Power supply for digital circuits, from internal voltage regulator.
OSCIN: Input Oscillator pin.
OSCOUT: Output Oscillator pin.
GND: Ground for digital circuits.
VBR: Power supply for Right half-bridge.
OUTR: Output of Right half-bridge.
PGND: Ground for power transistor.
OUTL: Output of Left half-bridge.
VBL: Power supply for Left half-bridge.
VB1: Power supply for voltage regulators.
VB2: Pre-regulated voltage for analog circuits.
CAN_L: Low side CAN bus output.
CAN_H: High side CAN bus input.
NRESET: Bidirectional. This active low signal forces the initialization of the MCU. This event
is the top priority non maskable interrupt. It can be used to reset external peripherals.
PWMI: PWM input. Directly connected to Input Capture 2 on Timer 2.
PWMO: PWM output. Connected to the output of PWM2 module.
AGND: Ground for all analog circuitry (except power bridge).
VCC: Output. 5V power supply for analog circuits, from internal voltage regulator.
1.5
Register & memory map
As shown in the Table 2, the MCU is capable of addressing 64K bytes of memories and I/O
registers. In this MCU, 63742 of these bytes are user accessible.
The available memory locations consist of 128 bytes of I/O registers, 256 bytes of RAM, 128
bytes of EEPROM and 16Kbytes of user EPROM/ROM. The RAM space includes 64 bytes
for the stack from 0140h to 017Fh.
The highest address bytes contain the user reset and interrupt vectors.
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