M24C01(2000) データシートの表示（PDF） - STMicroelectronics
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M24C01 Datasheet PDF : 20 Pages
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M24C16, M24C08, M24C04, M24C02, M24C01
Table 5B. DC Characteristics1
(TA = –40 to 125 °C; VCC = 4.5 to 5.5 V)
Symbol
Parameter
ILI
Input Leakage Current (SCL, SDA)
ILO Output Leakage Current
ICC Supply Current
ICC1 Supply Current (Stand-by)
VIL Input Low Voltage (E0, E1, E2, SCL, SDA)
VIH Input High Voltage (E0, E1, E2, SCL, SDA)
VIL Input Low Voltage (WC)
VIH Input High Voltage (WC)
VOL Output Low Voltage
Note: 1. This is preliminary data.
Test Condition
0 V ≤ VIN ≤ VCC
0 V ≤ VOUT ≤ VCC, SDA in Hi-Z
VCC=5V, fc=400kHz (rise/fall
time < 30ns)
VIN = VSS or VCC , VCC = 5 V
IOL = 3 mA, VCC = 5 V
Min.
– 0.3
0.7VCC
– 0.3
0.7VCC
Max. Unit
± 2 µA
± 2 µA
3
mA
5
µA
0.3 VCC V
VCC+1 V
0.5
V
VCC+1 V
0.4
V
Table 6A. AC Characteristics
M24C16, M24C08, M24C04, M24C02, M24C01
Symbol Alt.
Parameter
VCC=4.5 to 5.5 V VCC=2.5 to 5.5 V VCC=1.8 to 3.6 V
TA=0 to 70°C or TA=0 to 70°C or TA=0 to 70°C or Unit
–40 to 85°C
–40 to 85°C
–40 to 85°C4
Min Max Min Max Min Max
tCH1CH2
tR Clock Rise Time
300
300
300 ns
tCL1CL2
tF Clock Fall Time
300
300
300 ns
tDH1DH2 2 tR SDA Rise Time
20
300
20
300
20
300 ns
tDL1DL2 2
tF SDA Fall Time
20
300
20
300
20
300 ns
tCHDX 1 tSU:STA Clock High to Input Transition
600
600
600
ns
tCHCL tHIGH Clock Pulse Width High
600
600
600
ns
tDLCL tHD:STA Input Low to Clock Low (START)
600
600
600
ns
tCLDX tHD:DAT Clock Low to Input Transition
0
0
0
µs
tCLCH tLOW Clock Pulse Width Low
1.3
1.3
1.3
µs
tDXCX
tSU:DAT
Input Transition to Clock
Transition
100
100
100
ns
tCHDH tSU:STO Clock High to Input High (STOP) 600
600
600
ns
tDHDL
tBUF
Input High to Input Low (Bus
Free)
1.3
1.3
1.3
µs
tCLQV 3
tAA Clock Low to Data Out Valid
200
900
200
900
200
900 ns
tCLQX
tDH
Data Out Hold Time After Clock
Low
200
200
200
ns
fC
fSCL Clock Frequency
400
400
400 kHz
tW
tWR Write Time
5
10
10 ms
Note: 1. For a reSTART condition, or following a write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
4. This is preliminary data.
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