UPD16641 データシートの表示（PDF） - NEC => Renesas Technology

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UPD16641

SEMICONDUCTOR SELECTION GUIDE

NEC => Renesas Technology 

Microcomputer

4-Bit Single Chip Microcomputer

LCD Driver Series

s µPD753017 series

Type number

ROM (bytes)

RAM (∞ 4 bits)

General registers

Instruction cycle

µPD753012

µPD753016

µPD753017

µPD75P3018

12288

16384

24576

32768 (PROM)

1024

(4-bit ∞ 8) ∞ 4 banks or (8-bit ∞ 4) ∞ 4 banks

Selectable from 0.95 µs/1.91 µs/3.81 µs/15.3 µs (at main clock 4.19 MHz) ,

0.67µs/1.33 µs/2.67 µs/10.7 µs (at main clock 6.0 MHz) and

122 µs (at subclock 32 kHz)

CMOS

inputs

8 (also serve as INT, SIO)

Can be pulled up by software except P00

CMOS

Input/ inputs/outputs

16 (can drive LED)

output

40

ports N-ch

8 (can drive LED, withstand voltage 12 V, can be pulled up by mask option except PROM version)

inputs/outputs

CMOS

outputs

4/8 (also serve as segment outputs, selection by software)

LCD controller

• Segment outputs: 32 ∞ 4 (MAX.), • Display mode (static, 1/2, 1/3, 1/4 duty)

• LCD drive voltage generation step down registor (except PROM version)

Timer/Counters

5 channels • Timer/event counter ∞ 3 ch. (Applicable as a 16-bit Timer/Event counter by Cascade connection,

Infrared remote control carrier generator)

• Basic interval timer/watchdog timer

• Watch timer

Serial interface

NEC standard serial bus interface/3-line serial interface

Interrupts

• Vector interrupts: 8 (external: 3, internal: 5), • Test inputs: 2 (external: 1, internal: 1)

Clock output (PCL)

Buzzer output (BUZ)

• Φ, 524 kHz, 262 kHz, 65.5 kHz (Main system clock: 4.19 MHz)

• Φ, 750 kHz, 375 kHz, 93.7 kHz (Main system clock: 6.0 MHz)

• 2 kHz, 4 kHz, 32 kHz (Main system clock: 4.19 MHz or subsystem clock: 32.768 kHz)

• 2.86 kHz, 5.72 kHz, 45.8 kHz (Main system clock: 6.0 MHz)

Instruction set

• Bit data set/reset/test/boolean operation instructions

• 4/8-bit data transfer/operation/increment/decrement/compare instructions

• 8-bit data transfer instructions

Supply voltage

2.2 to 5.5 V (when External clock used VDD = 1.8 to 5.5 V)

Package

• 80-pin plastic QFP (0.5/0.65 mm pitch)

5

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