IRS21091SPBF データシートの表示（PDF） - International Rectifier

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IRS21091SPBF

HALF-BRIDGE DRIVER

International Rectifier 

IRS21091(S)PbF

Recommended Operating Conditions

The input/output logic timing diagram is shown in Fig.1. For proper operation the device should be used within the

recommended conditions. The VS offset rating is tested with all supply biased at a 15 V differential.

Symbol

Definition

Min.

Max. Units

VB

High-side floating supply absolute voltage

VS

High-side floating supply offset voltage

VS + 10

(Note 1)

VS + 20

600

VHO

High-side floating output voltage

VS

VB

VCC

Low-side and logic fixed supply voltage

VLO

Low-side output voltage

10

20

V

0

VCC

VIN

Logic input voltage (IN & DT/SD)

V SS

VCC

DT/SD

TA

Programmable deadtime and shutdown pin voltage

Ambient temperature

V SS

VCC

-40

125

°C

Note 1: Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to -VBS. (Please refer to the Design Tip

DT97-3 for more details).

Dynamic Electrical Characteristics

VBIAS (VCC, VBS) = 15 V, CL = 1000 pF, TA = 25 °C, unless otherwise specified.

Symbol

Definition

Min. Typ.

ton

Turn-on propagation delay

—

750

toff

Turn-off propagation delay

—

200

tsd

Shutdown propagation delay

—

550

MT

Delay matching, HS & LS turn-on/off

—

0

tr

Turn-on rise time

—

100

tf

Turn-off fall time

—

35

DT

Deadtime: LO turn-off to HO turn-on(DTLO-HO) & 400

540

HO turn-off to LO turn-on (DTHO-LO)

4

5

MDT

Deadtime matching = DTLO - HO - DTHO-LO

—

0

—

0

Max. Units Test Conditions

950

VS = 0 V

280

VS = 0 V or 600 V

715

70

ns

220

80

680

6

µs

60

ns

600

VS = 0 V

RDT= 0 Ω

RDT = 200 kΩ

RDT= 0 Ω

RDT = 200 kΩ

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