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BR24T64-W データシートの表示(PDF) - ROHM Semiconductor

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BR24T64-W Datasheet PDF : 37 Pages
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BR24T64-W
Block Diagram
A0 1
A1 2
64Kbit EEPROM Array
8bit
Address
Decoder 13bit
Word
Address Register
Data
Register
A2 3
GND 4
START
Control Circuit
STOP
ACK
High Voltage
Generating Circuit
Power Source
Voltage Detection
8 VCC
7 WP
6 SCL
5 SDA
Figure 3. Block Diagram
Datasheet
Pin Configuration
A0
1
A1
2
A2
3
GND 4
(TOP VIEW)
BR24T64-W
8 VCC
7 WP
6 SCL
5 SDA
Pin Descriptions
Terminal Input/
Name Output
Descriptions
A0
Input Slave address setting*
A1
Input Slave address setting*
A2
Input Slave address setting*
GND
SDA
SCL
-
Input/
Output
Input
Reference voltage of all input / output, 0V
Serial data input serial data output
Serial clock input
WP Input Write protect terminal
VCC
- Connect the power source.
*A0, A1 and A2 are not allowed to use as open.
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ2211115001
4/34
TSZ02201-0R2R0G100120-1-2
03.Sep.2018 Rev.005

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