MBF110PFW1STG データシートの表示（PDF） - Fujitsu

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MBF110PFW1STG

Solid-State Fingerprint Sensor

Fujitsu 

MBF110

RAH (A3-A0 Address 0001) Write Only

High Order Row Address Register

Bit 0 of this register and RAL form the 9-bit Row Address Register

that selects the row to be converted. The L1 and L2 bits control two

open-drain outputs that can be used to drive LEDs.

MSB

BIT7

L1

BIT6

L2

BIT5

–

BIT4

–

BIT3

–

BIT2

–

BIT1

–

LSB

BIT0

RA8

Bit Number

Bit Name

Function

7

L1

L1=0, LED1 output low

L1=1, LED1 output high-Z

6

[5:1]

0

L2

–

RA8

L2=0, LED 2 output low

L2=1, LED 2 output high-Z

Reserved, write 0 to these bits.

MSB of Row Address

inary

CAL (A3-A0 Address 0010) Read/Write

Low Order Column Address Register

im CAL is a read/write register. Writing to this address writes to the

l low-order 8 bits of the 9-bit ColumnAddress Register.The 9-bit

Column Address Register selects a column from 0 through 299.

e Writing to CAL causes the analog-to-digital (A/D) converter to

Pr MSB

begin digitizing its input. The input of the A/D converter is selected

by bits 7 and 6 of the CAH register. The user should wait until the

row capture is completed before writing to the CAL.

Reading from this address returns the output of the A/D converter.

After writing to CAL, the user should wait until A/D conversion

completes before reading the A/D converter.

LSB

BIT7

BIT6

BIT5

BIT4

BIT3

BIT2

BIT1

BIT0

CA7

CA6

CA5

CA4

CA3

CA2

CA1

CA0

Bit Number

[7:0]

Bit Name

CA[7:0]

Function

(WRITE) Low eight bits of Column Address Register.

(READ) Output of A/D converter.

Fujitsu Microelectronics, Inc. 5

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