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DS3502 データシートの表示(PDF) - Maxim Integrated

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DS3502
MaximIC
Maxim Integrated MaximIC
DS3502 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
High-Voltage, NV, I2C POT
NONVOLATILE MEMORY CHARACTERISTICS
(VCC = +2.5V to +5.5V)
PARAMETER
EEPROM Write Cycles
SYMBOL
TA = +70°C
TA = +25°C
CONDITIONS
MIN TYP
50,000
200,000
MAX UNITS
Writes
Note 1: All voltages are referenced to ground. Currents entering the IC are specified positive and currents exiting the IC are negative.
Note 2: ICC is specified with the following conditions: SCL = 400kHz, SDA pulled up, and RL, RW, RH floating.
Note 3: ISTBY is specified with SDA = SCL = VCC = 5.5V and resistor pins floating.
Note 4: This is the minimum VCC voltage that causes NV memory to be recalled.
Note 5: This is the time from VCC > VPOR until initial memory recall is complete.
Note 6: Integral nonlinearity is the deviation of a measured resistor setting value from the expected values at each particular resis-
tor setting. Expected value is calculated by connecting a straight line from the measured minimum setting to the mea-
sured maximum setting. INL = [V(RW)i - (V(RW)0]/LSB(ideal) - i, for i = 0...127.
Note 7: Differential nonlinearity is the deviation of the step-size change between two LSB settings from the expected step size.
The expected LSB step size is the slope of the straight line from measured minimum position to measured maximum posi-
tion. DNL = [V(RW)i+1 - (V(RW)i]/LSB(ideal) - 1, for i = 0...126.
Note 8: ZS error = code 0 wiper voltage divided by one LSB (ideal).
Note 9: FS error = (code 127 wiper voltage - V+) divided by one LSB (ideal).
Note 10: I2C interface timing shown is for fast-mode (400kHz) operation. This device is also backward-compatible with I2C standard
mode timing.
Note 11: CB—total capacitance of one bus line in picofarads.
Note 12: EEPROM write time begins after a STOP condition occurs.
Note 13: Pulses narrower than max are suppressed.
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