MAX793TCSE(1996) データシートの表示（PDF） - Maxim Integrated

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MAX793TCSE
(Rev.:1996)

3.0V/3.3V Adjustable Microprocessor Supervisory Circuits

Maxim Integrated 

3.0V/3.3V Adjustable Microprocessor

Supervisory Circuits

3.3V

0.1µF

R1

(OPTIONAL)

Si9433DY

SILICONIX

D

S

PMOS

VCC BATT ON OUT

R2

3.6V

0.1µF

+5V SUPPLY

+5V FAILURE

RESET IN CE OUT

MAX794

BATT

CE IN

WDI

WDO LOWLINE

MR

PFO

RESET

0.1µF

CMOS

RAM

ADDRESS

DECODER

VCC

4.7k

VCC

A0-A15

I/O

NMI

RESET

PFI

GND

( ) VRST = VRST IN

R1

R2

+

1

Figure 3. MAX794 Standard Application Circuit

Reset Threshold

The MAX793T/MAX795T are intended for 3.3V systems

with a ±5% power-supply tolerance and a 10% systems

tolerance. Except when MR is asserted, reset will not

assert as long as the power supply remains above

3.15V (3.3V - 5%). Reset is guaranteed to assert

before the power supply falls below 3.0V (3.3V - 10%).

The MAX793S/MAX795S are designed for 3.3V ±10%

power supplies. Except when MR is asserted, they are

guaranteed not to assert reset as long as the supply

remains above 3.0V (3.0V is just above 3.3V - 10%).

Reset is guaranteed to assert before the power supply

falls below 2.85V (3.3V - 14%).

The MAX793R/MAX795R are optimized to monitor 3.0V

±10% power supplies. Reset will not occur until VCC

falls below 2.7V (3.0V - 10%), but is guaranteed to

occur before the supply falls below 2.55V (3.0V - 15%).

Program the MAX794’s reset threshold with an external

voltage divider to RESET IN. The reset-threshold toler-

ance will be a combination of the RESET IN tolerance

and the tolerance of the resistors used to make the

external voltage divider. Calculate the reset threshold

as follows:

VRST = VRST IN (R1 / R2 + 1)

VRST

VRST

VCC

tRP

RESET

PFO

(EXTERNALLY HELD AT 0V)

PFO STATE LATCHED,

FRESHNESS SEAL ENABLED.

RESET PULLED UP TO VCC

Figure 4. Battery Freshness Seal Enable Timing

Using the standard application circuit (Figure 3), the

reset threshold may be programmed anywhere in the

range of VSW (the battery switch threshold) to 5.5V.

Reset is asserted when VCC falls below VSW.

Battery Freshness Seal

The MAX793/MAX794’s battery freshness seal discon-

nects the backup battery from internal circuitry until it is

needed. This allows an OEM to ensure that the backup

battery connected to BATT will be fresh when the final

product is put to use. To enable the freshness seal,

connect a battery to BATT, ground PFO, bring VCC

above the reset threshold and hold it there until reset is

deasserted following the reset timeout period, then

bring VCC back down again (Figure 4). Once the bat-

tery freshness seal is enabled (disconnecting the back-

up battery from the internal circuitry and anything

connected to OUT), it remains enabled until VCC is

brought above VRST. Note that connecting PFO to MR

will not interfere with battery freshness seal operation.

BATT OK Output (MAX793)

BATT OK indicates the status of the backup battery.

When reset is not asserted, the MAX793 checks the

battery voltage continuously. If VBATT is below VBOK

(2.0V min), BATT OK goes low; otherwise, it remains

pulled up to VCC. BATT OK also goes low when VCC

goes below VSW.

Watchdog Input (MAX793/MAX794)

In the MAX793/MAX794, the watchdog circuit monitors

the µP’s activity. If the µP does not toggle the watch-

dog input (WDI) within 1.6sec, WDO goes low. The

internal 1.6sec timer is cleared and WDO returns high

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