MAX793RCSE データシートの表示（PDF） - Maxim Integrated

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MAX793RCSE

3.0V/3.3V Adjustable Microprocessor Supervisory Circuits

Maxim Integrated 

3.0V/3.3V Adjustable Microprocessor

Supervisory Circuits

Figure 18 shows maximum transient duration vs. reset-

comparator overdrive, for which reset pulses are not

generated. The graph was produced using negative-

going VCC pulses, starting at 3.3V and ending below

the reset threshold by the magnitude indicated (reset

comparator overdrive). The graph shows the maximum

pulse width a negative-going VCC transient can typically

have without causing a reset pulse to be issued. As

the amplitude of the transient increases (i.e., goes far-

ther below the reset threshold), the maximum allowable

pulse width decreases. Typically, a VCC transient that

goes 40mV below the reset threshold and lasts for 10µs

or less does not cause a reset pulse to be issued.

A 0.1µF bypass capacitor mounted close to the VCC

pin provides additional transient immunity.

Watchdog Software Considerations

There is a way to help the watchdog timer monitor soft-

ware execution more closely, which involves setting

and resetting the watchdog input at different points in

the program rather than pulsing the watchdog input

high-low-high or low-high-low. This technique avoids a

stuck loop, in which the watchdog timer would continue

to be reset within the loop, keeping the watchdog from

timing out. Figure 19 shows an example of a flow dia-

gram where the I/O driving the watchdog input is set

high at the beginning of the program, set low at the

beginning of every subroutine or loop, then set high

again when the program returns to the beginning. If the

program should hang in any subroutine, the problem

would quickly be corrected, since the I/O is continually

set low and the watchdog timer is allowed to time out,

causing a reset or interrupt to be issued.

100

90

80

70

60

50

40

30

20

10

0

10 20 30 40 50 60 70 80 90 100

RESET COMPARATOR OVERDRIVE, VRST - VCC (mV)

Figure 18. Maximum Transient Duration without Causing a

Reset Pulse vs. Reset Comparator Overdrive

START

SET WDI

HIGH

PROGRAM

CODE

Subroutine or

Program Loop

SET WDI LOW

RETURN

Figure 19. Watchdog Flow Diagram

18 ______________________________________________________________________________________

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