LTC1325CN データシートの表示（PDF） - Linear Technology
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LTC1325CN Datasheet PDF : 24 Pages
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LTC1325
FUNCTIONAL DESCRIPTIO
COMMAND WORD
The command word is 22 bits long and contains all the
information needed to configure and control the chip. On
power-up all bits are cleared to logical “0.”
1
2
3
4
5
6
7
8
START
=1
MOD0
MOD1
SGL/
DIFF
MSBF
DS0
DS1
DS2
9 10 11 12 13 14 15 16
DIV0 DIV1 DIV2 DIV3 PS DR0 DR1 DR2
17 18 19 20 21 22
FSCLR TO0 TO1 TO2 VR0 VR1
LTC1325 • F01
Figure 1. Command Word
Bit 1: Start Bit (Start)
The first “logical one” clocked into the DIN input after CS
goes low is the start bit. The start bit initiates the data
transfer and all leading zeros which precede this logical
one will be ignored. After the start bit is received, the
remaining bits of the command word will be clocked in.
Bits 2 and 3: Mode Select (MOD0 and MOD1)
The two mode bits determine which of four modes the chip
will be in: idle, discharge, charge or gas gauge.
MOD1
0
0
1
1
MOD0
0
1
0
1
DESCRIPTION
Idle
Discharge
Charge
Gas Gauge
Bit 4: Single-Ended Differential Conversion (SGL/DIFF)
SGL/DIFF determines whether the ADC makes a single-
ended measurement with respect to ground or a differen-
tial measurement with respect to the Sense pin.
SGL/DIFF
0
1
DESCRIPTION
Single-Ended ADC Conversion
Differential ADC Conversion (with respect to Sense)
Bit 5: MSB-First/LSB-First (MSBF)
The ADC data is programmed for MSB-first or LSB-first
sequence using the MSBF bit. See Serial I/O description
for details.
MSBF
0
1
DESCRIPTION
LSB-First Data Follows MSB-First Data
MSB-First Data Only
Bits 6 to 8: ADC Data Input Select (DS0 to DS2)
DS2, DS1 and DS0 select which circuit is connected to the
ADC input. Do not use unlisted combinations.
DS2 DS1 DS0 DESCRIPTION
0
0
0 Gas Gauge Output
0
0
1 Battery Temperature Pin, TBAT
0
1
0 Ambient Temperature Pin, TAMB
0
1
1 Battery Divider Output Voltage, VCELL
1
0
0 VIN Pin
Bits 9 to 12: Battery Divider Ratio Select (DIV0 to DIV3)
DIV3, DIV2, DIV1 and DIV0 select the division ratio for the
voltage divider across the battery.
DIV3 DIV2 DIV1 DIV0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
DESCRIPTION
(VBAT – VSENSE)/1
(VBAT – VSENSE)/2
(VBAT – VSENSE)/3
(VBAT – VSENSE)/4
(VBAT – VSENSE)/5
(VBAT – VSENSE)/6
(VBAT – VSENSE)/7
(VBAT – VSENSE)/8
(VBAT – VSENSE)/9
(VBAT – VSENSE)/10
(VBAT – VSENSE)/11
(VBAT – VSENSE)/12
(VBAT – VSENSE)/13
(VBAT – VSENSE)/14
(VBAT – VSENSE)/15
(VBAT – VSENSE)/16
10
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