MC10198P データシートの表示（PDF） - ON Semiconductor
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MC10198P Datasheet PDF : 12 Pages
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MC10198
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts)
@ Test Temperature
–30°C
VIHmax
–0.890
VILmin
–1.890
VIHAmin
–1.205
VILAmax
–1.500
VEE
–5.2
+25°C –0.810
–1.850
–1.105
–1.475
–5.2
+85°C –0.700
–1.825
–1.035
–1.440
–5.2
Characteristic
Power Supply Drain Current
Input Current
Symbol
IE
IinH
Pin
Under
Test
8
5, 10
13
15
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
VIHmax
VILmin
VIHAmin
VILAmax
VEE
6, 8
5,10
6, 8
13
6, 8
15
6, 8
IinL
5
5
6, 8
Output Voltage
Logic 1 VOH
2
13
6, 8
3
13 (4.)
6, 8
Output Voltage
Logic 0
VOL
2
13 (4.)
6, 8
3
13
6, 8
Threshold Voltage
Logic 1 VOHA
2
3
15
6, 8
15
6, 8
Threshold Voltage
Logic 0 VOLA
2
3
15
6, 8
15
6, 8
Switching Times
(50Ω Load)
+1.11V
Pulse In Pulse Out –3.2 V
Trigger Input
tT+Q+
3
10
tT–Q+
3
5
High Speed Trigger Input
tHS+Q+
3
Minimum Timing Pulse Width
PWQmin
3
Maximum Timing Pulse Width
PWQmax
3
Minimum Trigger Pulse Width
PWT
3
Minimum Hi–Spd Trigger Pulse
Width
PWHS
3
13
3
6, 8
13
3
6, 8
15
3
6, 8
Note 2.
6, 8
Note 3.
6, 8
13
3
6, 8
15
3
6, 8
Rise Time
(20 to 80%)
3
6, 8
Fall Time
(20 to 80%)
3
6, 8
Enable Setup Time
tsetup (E)
3
Enable Hold Time
thold (E)
3
1. The monostable is in the timing mode at the time of this test.
2. CEXT = 0 (Pin 4 Open); REXT = 0 (Pin 6 tied to VEE).
3. CEXT = 10µF (Pin); REXT = 2.7k (Pin 6).
4.
P1
VIHmax
VILmin
5
3
6, 8
5
3
6, 8
(VCC)
Gnd
1, 4, 16
1, 4, 16
1, 4, 16
1, 4, 16
1, 4, 16
1, 4, 16
1, 4, 16
1, 4, 16
1, 4, 16
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
+2.0 V
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
1, 16, 4
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50–ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
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