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SC1402(2001) データシートの表示(PDF) - Semtech Corporation

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SC1402 Datasheet PDF : 18 Pages
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SC1402
POWER MANAGEMENT
Pin Descriptions (Cont.)
Pin#
Pin Name Pin Function
9
REF
2.5V Reference voltage output. Bypass to GND with 1µF minimum capacitor.
10
PSAVE
Logic control input that disables PSAVE mode when high. Connect to GND for power
save mode.
11
RESET
Active low timed output. RESET swings from GND to VL. Goes high after 32,000
clock cycle delay following power up as a power good signal.
Feedback input for 5V SMPS. Connect FB5 to a resistor divider for adjustable output
12
FB5
mode and FB5 regulates to REF (approx. 2.5V). FB5 selects the 5V fixed output
voltage setting when tied to GND.
13
CSL5
Current sense input for 5V SMPS.
14
CSH5
Current sense input for 5V SMPS.
15
SEQ
Inputs that selects SMPS power up sequence.
16
DH5
Gate drive output for the 5V, high side N-Channel MOSFET.
17
PHASE5 Switching node inductor connection.
18
BST5
Boost capacitor connection for 5V, SMPS high-side gate drive. Connect a 0.1µF
capacitor.
19
DL5
Gate drive output for the 5V, SMPS low-side N-Channel MOSFET.
20
PGND
Power ground.
21
VL
5V, Internal linear regulator output.
22
V+
Battery voltage input.
23
SHDN
Shutdown control input, active low.
24
DL3
Gate drive output for the 3.3V, SMPS low-side N-Channel MOSFET.
25
BST3
Boost capacitor connection for high side gate drive. Connect a 0.1µF capacitor.
26
PHASE3 Switching node inductor connection.
27
DH3
Gate drive output for the 3.3V, high-side N-Channel MOSFET.
28
RUN/ON3 ON/OFF control input of 3.3V SMPS.
Note:
1. All logic level inputs and outputs are open collector TTL compatible.
2001 Semtech Corp.
7
www.semtech.com

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