SST32HF802-70-4E-EK データシートの表示（PDF） - Silicon Storage Technology
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SST32HF802-70-4E-EK Datasheet PDF : 28 Pages
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Multi-Purpose Flash (MPF) + SRAM ComboMemory
SST32HF802 / SST32HF162 / SST32HF164
Data Sheet
TABLE 5: DC OPERATING CHARACTERISTICS (VDD = VDDF AND VDDS = 2.7-3.3V)
Limits
Symbol Parameter
Min Max Units Test Conditions
IDD
Power Supply Current
Read
Flash
SRAM
Concurrent Operation
Write
Flash
SRAM
ISB
Standby VDD Current 3.0V
3.3V
Address input = VIL/VIH, at f=1/TRC Min,
VDD=VDD Max, all DQs open
OE#=VIL, WE#=VIH
20 mA BEF#=VIL, BES#=VIH
20 mA BEF#=VIH, BES#=VIL
45 mA BEF#=VIH, BES#=VIL
WE#=VIL
25 mA BEF#=VIL, BES#=VIH, OE#=VIH
20 mA BEF#=VIH, BES#=VIL
40
µA VDD = VDD Max, BEF#=BES#=VIHC
75
ILI
ILO
VIL
VIH
VIHC
VOL
VOH
VOLS
VOHS
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Input High Voltage (CMOS)
Flash Output Low Voltage
Flash Output High Voltage
SRAM Output Low Voltage
SRAM Output High Voltage
1
1
0.8
0.7VDD
VDD-0.3
0.2
VDD-0.2
0.4
2.2
µA VIN=GND to VDD, VDD=VDD Max
µA VOUT=GND to VDD, VDD=VDD Max
V VDD=VDD Min
V VDD=VDD Max
V VDD=VDD Max
V IOL=100 µA, VDD=VDD Min
V IOH=-100 µA, VDD=VDD Min
V IOL=1 mA, VDD=VDD Min
V IOH=-500 µA, VDD=VDD Min
T5.5 520
TABLE 6: RECOMMENDED SYSTEM POWER-UP TIMINGS
Symbol
Parameter
Minimum
Units
TPU-READ1
TPU-WRITE1
Power-up to Read Operation
Power-up to Program/Erase Operation
100
µs
100
µs
T6.0 520
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 7: CAPACITANCE (Ta = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
Maximum
CI/O1
I/O Pin Capacitance
VI/O = 0V
12 pF
CIN1
Input Capacitance
VIN = 0V
12 pF
T7.0 520
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 8: FLASH RELIABILITY CHARACTERISTICS
Symbol
Parameter
Minimum Specification Units Test Method
NEND1
Endurance
10,000
Cycles JEDEC Standard A117
TDR1
Data Retention
100
Years JEDEC Standard A103
ILTH1
Latch Up
100 + IDD
mA JEDEC Standard 78
T8.1 520
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2001 Silicon Storage Technology, Inc.
9
S71171-05-000 8/01 520
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