STD25NF10 データシートの表示（PDF） - STMicroelectronics

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STD25NF10

N-CHANNEL 100V - 0.033Ω - 25A DPAK LOW GATE CHARGE STripFET™ POWER MOSFET

STMicroelectronics 

STD25NF10

N-CHANNEL 100V - 0.033Ω - 25A DPAK

LOW GATE CHARGE STripFET™ POWER MOSFET

TYPE

VDSS

RDS(on)

ID

STD25NF10

100 V < 0.038 Ω 25 A

s TYPICAL RDS(on) = 0.033Ω

s EXCEPTIONAL dv/dt CAPABILITY

s 100% AVALANCHE TESTED

s APPLICATION ORIENTED

CHARACTERIZATION

DESCRIPTION

This Power Mosfet series realized with STMicro-

electronics unique STripFET process has specifical-

ly been designed to minimize input capacitance and

gate charge. It is therefore suitable as primary

switch in advanced high-efficiency isolated DC-DC

converters for Telecom and Computer application. It

is also intended for any application with low gate

charge drive requirements.

3

1

DPAK

INTERNAL SCHEMATIC DIAGRAM

APPLICATIONS

s HIGH-EFFICIENCY DC-DC CONVERTERS

s UPS AND MOTOR CONTROL

ABSOLUTE MAXIMUM RATINGS

Symbol

Parameter

VDS

Drain-source Voltage (VGS = 0)

VDGR

Drain-gate Voltage (RGS = 20 kΩ)

VGS

Gate- source Voltage

ID (*)

Drain Current (continuos) at TC = 25°C

ID

IDM (l)

Drain Current (continuos) at TC = 100°C

Drain Current (pulsed)

PTOT

Total Dissipation at TC = 25°C

Derating Factor

dv/dt (1) Peak Diode Recovery voltage slope

EAS (2) Single Pulse Avalanche Energy

Tstg

Storage Temperature

Tj

Operating Junction Temperature

(q) Pulse width limited by safe operating area

(*) Current Limited by Package

May 2002

Value

100

100

± 20

25

21

100

100

0.67

13

480

Unit

V

V

V

A

A

A

W

W/°C

V/ns

mJ

–55 to 175

°C

(1) ISD ≤35A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX.

(2) Starting Tj = 25°C, ID = 12.5A, VDD = 50V

1/9

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