AD9840 データシートの表示（PDF） - Analog Devices
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AD9840 Datasheet PDF : 16 Pages
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AD9840A
PIN CONFIGURATION
48 47 46 45 44 43 42 41 40 39 38 37
DRVSS 1
DRVSS 2
(LSB) D0 3
D1 4
D2 5
D3 6
D4 7
D5 8
D6 9
D7 10
D8 11
(MSB) D9 12
PIN 1
IDENTIFIER
AD9840A
TOP VIEW
(Not to Scale)
36 AUX1IN
35 AVSS
34 AUX2IN
33 AVDD2
32 BYP4
31 NC
30 CCDIN
29 BYP2
28 BYP1
27 AVDD1
26 AVSS
25 AVSS
NC = NO CONNECT 13 14 15 16 17 18 19 20 21 22 23 24
PIN FUNCTION DESCRIPTIONS
Pin Number
1, 2
3–12
13
14
15, 18, 24, 41
16
17
19
20
21
22
23
25, 26, 35
27
28
29
30
31
32
33
34
36
37
38
39
40
42
43
44
45
46
47
48
Name
DRVSS
D0–D9
DRVDD
DRVSS
DVSS
DATACLK
DVDD1
PBLK
CLPOB
SHP
SHD
CLPDM
AVSS
AVDD1
BYP1
BYP2
CCDIN
NC
BYP4
AVDD2
AUX2IN
AUX1IN
CML
VRT
VRB
DVDD2
THREE-STATE
NC
STBY
NC
SL
SDATA
SCK
Type
P
DO
P
P
P
DI
P
DI
DI
DI
DI
DI
P
P
AO
AO
AI
NC
AO
P
AI
AI
AO
AO
AO
P
DI
NC
DI
NC
DI
DI
DI
Description
Digital Driver Ground
Digital Data Outputs
Digital Output Driver Supply
Digital Output Driver Ground
Digital Ground
Digital Data Output Latch Clock
Digital Supply
Preblanking Clock Input
Black Level Clamp Clock Input
CDS Sampling Clock for CCD’s Reference Level
CDS Sampling Clock for CCD’s Data Level
Input Clamp Clock Input
Analog Ground
Analog Supply
Internal Bias Level. Decoupling
Internal Bias Level Decoupling
Analog Input for CCD Signal
Leave Floating or Decouple to Ground with 0.1 F
Internal Bias Level Decoupling
Analog Supply
Analog Input
Analog Input
Internal Bias Level Decoupling
A/D Converter Top Reference Voltage Decoupling
A/D Converter Bottom Reference Voltage Decoupling
Digital Supply
Digital Output Disable. Active High
May be tied High or Low. Should not be left floating.
Standby Mode, Active High. Same as Serial Interface Standby Mode
Internally Not Connected. May be tied high or low
Serial Digital Interface Load Pulse
Serial Digital Interface Data
Serial Digital Interface Clock
TYPE: AI = Analog Input, AO = Analog Output, DI = Digital Input, DO = Digital Output, P = Power.
–6–
REV. 0
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