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M29W800T データシートの表示(PDF) - STMicroelectronics

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M29W800T Datasheet PDF : 33 Pages
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M29W800T, M29W800B
Table 3B. M29W800B Block Address Table
Address Range (x8) Address Range (x16) A18 A17 A16 A15 A14 A13 A12
00000h-03FFFh
00000h-01FFFh
0
0
0
0
0
0
X
04000h-05FFFh
02000h-02FFFh
0
0
0
0
0
1
0
06000h-07FFFh
03000h-03FFFh
0
0
0
0
0
1
1
08000h-0FFFFh
04000h-07FFFh
0
0
0
0
1
X
X
10000h-1FFFFh
08000h-0FFFFh
0
0
0
1
X
X
X
20000h-2FFFFh
10000h-17FFFh
0
0
1
0
X
X
X
30000h-3FFFFh
18000h-1FFFFh
0
0
1
1
X
X
X
40000h-4FFFFh
20000h-27FFFh
0
1
0
0
X
X
X
50000h-5FFFFh
28000h-2FFFFh
0
1
0
1
X
X
X
60000h-6FFFFh
30000h-37FFFh
0
1
1
0
X
X
X
70000h-7FFFFh
38000h-3FFFFh
0
1
1
1
X
X
X
80000h-8FFFFh
40000h-47FFFh
1
0
0
0
X
X
X
90000h-9FFFFh
48000h-4FFFFh
1
0
0
1
X
X
X
A0000h-AFFFFh
50000h-57FFFh
1
0
1
0
X
X
X
B0000h-BFFFFh
58000h-5FFFFh
1
0
1
1
X
X
X
C0000h-CFFFFh
60000h-67FFFh
1
1
0
0
X
X
X
D0000h-DFFFFh
68000h-6FFFFh
1
1
0
1
X
X
X
E0000h-EFFFFh
70000h-77FFFh
1
1
1
0
X
X
X
F0000h-FfFFFh
78000h-7FFFFh
1
1
1
1
X
X
X
Instructions
Seven instructions are defined to perform Read
Array, Auto Select (to read the ElectronicSignature
or Block ProtectionStatus), Program, Block Erase,
Chip Erase, Erase Suspend and Erase Resume.
The internal P/E.C. automatically handles all tim-
ing and verification of the Program and Erase
operations. The Status Register Data Polling, Tog-
gle, Error bits and the RB output may be read at
any time, during programming or erase, to monitor
the progress of the operation.
Instructions are composed of up to six cycles. The
first two cycles input a Coded sequence to the
Command Interfacewhich iscommon to all instruc-
tions (see Table 8).
The third cycle inputs the instruction set-up com-
mand. Subsequent cycles output the addressed
data, Electronic Signature or Block Protection
Status for Read operations. In order to give addi-
tional data protection, the instructions for Program
and Block or Chip Erase require further command
inputs. For a Program instruction, the fourth com-
mand cycle inputs the address and data to be
programmed. For an Erase instruction (Block or
Chip), the fourth and fifth cycles input a further
Coded sequence before the Erase confirm com-
mand on the sixthcycle. Erasure of a memory block
may be suspended, in order to read data from
another block or to program data in another block,
and then resumed.
When power is first applied or if VCC falls below
VLKO, the command interface is reset to Read
Array.
7/33

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