HT9480(1998) データシートの表示（PDF） - Holtek Semiconductor
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HT9480 Datasheet PDF : 57 Pages
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HT9480
The function bits (ON, RES) and indication
bits (CT, STB, BF, OR, BL and DR) are all
used to control the status of the decoder which
is operated through the pager control address
as described in the following table.
• Pager data address
The pager data address (1FH) are the parallel
data lines for decoder data transfer.
Symbol Bit R/W
Description
On/Off control bit
ON
0
R/W
This bit selects the ON or STANDBY state of the decoder.
0: ON state
1: STANDBY state
RES
Reset output for the decoder core
1 R/W The µC has to set the RES bit low and then high after the pager controller
is turned on.
Call termination indication bit
This bit decides the call termination status, when a valid code-word is
CT
2
R received
0: End of code-word receive
1: Receiving message code-word
STB
BF
Standby indication bit
3
R When the value of the ON bit is 1, the system goes into the STANDBY state.
The STANDBY state allows the µC to execute the configuration RAM setting.
Battery fail indication bit
4
R Once the decoder detects that the battery fail interrupt is low, the BF bit
will be low but unlatched.
Out-of-range indication bit
Whenever the decoder detects an out-of-range condition, this bit is cleared
low after end of the programmed out-of-range hold of time that is selected
OR
5
R
by the configuration registers (SPF06 and SPF07). The out-of-range
indication may be tested for an out-of-range condition whenever the
interface enable of the decoder is active; otherwise the OR is normally
high. The out-of-range indication is set high by detection of a valid data
transmission or by switching the decoder to be in the STANDBY state.
Battery low indication bit
BL
6
R/W
The battery low indication is periodically tested for a battery low condition.
If the decoder encounters a battery low condition the battery low indication
bit is cleared low. At this time, the µC should set the BL bit high.
Data ready interrupt indication bit
DR
7
R/W
When a valid call is detected, data starts transfer. The DR bit becomes low
when the serial data is changed to parallel data (1FH). After reading the
parallel data, the µC software has to set the DR bit high.
26
23th Feb ’98
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