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SST45VF010 データシートの表示(PDF) - Silicon Storage Technology

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SST45VF010
SST
Silicon Storage Technology SST
SST45VF010 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
512 Kbit / 1 Mbit / 2 Mbit Serial Flash
SST45VF512 / SST45VF010 / SST45VF020
Advance Information
TABLE 6: CAPACITANCE (Ta = 25 °C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
COUT1
CIN1
Output Pin Capacitance
Input Capacitance
VOUT = 0V
VIN = 0v
Maximum
12 pF
6 pF
514 PGM T6.0
TABLE 7: RELIABILITY CHARACTERISTICS
Symbol
Parameter
NEND1
TDR1
VZAP_HBM1
VZAP_MM1
ILTH1
Endurance
Data Retention
ESD Susceptibility
Human Body Model
ESD Susceptibility
Machine Model
Latch Up
Minimum Specification
10,000
100
2000
200
100 + IDD
Units
Cycles
Years
Volts
Volts
mA
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard A114
JEDEC Standard A115
JEDEC Standard 78
514 PGM T7.0
Note: 1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 8: AC OPERATING CHARACTERISTICS VDD = 2.7-3.6V
Symbol Parameter
Min
FCLK
Serial Clock Frequency
TSCKH Serial Clock High Time
45
TSCKL
Serial Clock Low Time
45
TCES
CE# Setup Time
250
TCEH
CE# Hold Time
250
TCPH
CE# High Time
250
TCHZ
CE# High to High-Z Output
TCLZ
CE# Low to Low-Z Output
0
TRLZ
RESET# Low to High-Z Output
TDS
Data In Setup Time
20
TDH
Data In Hold Time
20
TOH
Output Hold from SCK Change
0
TV
Output Valid from SCK
TWPS
Write Protect Setup Time
10
TWPH
Write Protect Hold Time
10
TSE
Sector-Erase
TSCE
Chip-Erase
TBP
Byte-Program
TRST
Reset Pulse Width
10
TREC
Reset Recovery Time
TPURST Reset Time After Power-Up
10
Limits
Max
10
25
25
35
25
100
20
1
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
ms
µs
µs
µs
µs
514 PGM T8.2
© 2000 Silicon Storage Technology, Inc.
6
S71178
514-1 10/00

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