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BU9877FV データシートの表示(PDF) - ROHM Semiconductor

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BU9877FV Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
Memory ICs
BU9877FV
Start condition
SCL
Start condition
Stop condition
SDA
1 0 1 0 A2 A1 A0 0
WA7 WA0
1 0 1 0 A2 A1 A0 1
D7
D0 1
Slave address
Word address
Slave address
ACK signal (output)
Fig. 9 Random read cycle
Read data
ACK signal (input)
• This command enables reading of the data at the specified word address.
• If the ACK signal LOW following D0 is detected and no stop condition is sent from the master side, reading can be
continued sequentially to the data of the next word address.
• To terminate this command, HIGH is input at the ACK signal timing (following any D0), then stop condition is input.
Start condition
SCL
SDA
1 0 1 0 A2 A1 A0 1
D7
D0
Slave address
Read data
ACK signal (output)
Stop condition
D7
D0
Read data
n+a
ACK signal (input)
Fig. 10 Sequential read cycle
• If the ACK signal is detected following D0 and no stop condition is sent from the master side, reading can be con-
tinued sequentially to the data of the next word address.
• To terminate this command, HIGH is input at the ACK signal timing (following any D0), then stop condition is input.
8

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